util: Make x86-add-xcr0 work for testlib checkpoints
Change-Id: I7b93d7afc7710bd43412a77a204ce8838d0bfb4e
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@@ -44,3 +44,11 @@ def upgrader(cpt):
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# Add the default value of XCR0 (1) if missing
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regVals = f"{regVals} 1"
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cpt.set(sec, "regVal", regVals)
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elif re.search(rf"board\.processor\.cores.*isa$", sec):
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# ISA name doesn't appear to be anywhere in the checkpoint.
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# Assume it is X86.
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regVals = cpt.get(sec, "regVal")
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# Add the default value of XCR0 (1) if missing
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regVals = f"{regVals} 1"
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cpt.set(sec, "regVal", regVals)
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