misc: Use python 3's argumentless super().

When calling a method in a superclass, you can/should use the super()
method to get a reference to that class. The python 2 version of that
method takes two parameters, the current class name, and the "self"
instance. The python 3 version takes no arguments. This is better for a
at least three reasons.

First, this version is less verbose because you don't have to specify
any arguments.

Second, you don't have to remember which argument goes where (I always
have to look it up), and you can't accidentally use the wrong class
name, or forget to update it if you copy code from a different class.

Third, this version will work correctly if you use a class decorator.
I don't know exactly how the mechanics of this work, but it is referred
to in a comment on this stackoverflow question:

https://stackoverflow.com/questions/681953/how-to-decorate-a-class

Change-Id: I427737c8f767e80da86cd245642e3b057121bc3b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52224
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/python/gem5/components/boards/abstract_board.py

@@ -68,7 +68,7 @@ class AbstractBoard(System):
         memory: "AbstractMemory",
         cache_hierarchy: "AbstractCacheHierarchy",
     ) -> None:
-        super(AbstractBoard, self).__init__()
+        super().__init__()
         """
         :param clk_freq: The clock frequency for this board.
         :param processor: The processor for this board.

src/python/gem5/components/boards/simple_board.py

@@ -58,7 +58,7 @@ class SimpleBoard(AbstractBoard, SEBinaryWorkload):
         memory: AbstractMemorySystem,
         cache_hierarchy: AbstractCacheHierarchy,
     ) -> None:
-        super(SimpleBoard, self).__init__(
+        super().__init__(
             clk_freq=clk_freq,
             processor=processor,
             memory=memory,
@@ -110,4 +110,4 @@ class SimpleBoard(AbstractBoard, SEBinaryWorkload):
         # The simple board just has one memory range that is the size of the
         # memory.
         self.mem_ranges = [AddrRange(memory.get_size())]
-        memory.set_memory_range(self.mem_ranges)
+        memory.set_memory_range(self.mem_ranges)

src/python/gem5/components/boards/test_board.py

@@ -56,7 +56,7 @@ class TestBoard(AbstractBoard):
         memory: AbstractMemorySystem,
         cache_hierarchy: AbstractCacheHierarchy,
     ):
-        super(TestBoard, self).__init__(
+        super().__init__(
             clk_freq=clk_freq,
             processor=processor,
             memory=memory,

src/python/gem5/components/boards/x86_board.py

@@ -78,7 +78,7 @@ class X86Board(AbstractBoard, KernelDiskWorkload):
         memory: AbstractMemorySystem,
         cache_hierarchy: AbstractCacheHierarchy,
     ) -> None:
-        super(X86Board, self).__init__(
+        super().__init__(
             clk_freq=clk_freq,
             processor=processor,
             memory=memory,

src/python/gem5/components/cachehierarchies/abstract_cache_hierarchy.py

@@ -35,7 +35,7 @@ class AbstractCacheHierarchy(SubSystem):
     __metaclass__ = ABCMeta
 
     def __init__(self):
-        super(AbstractCacheHierarchy, self).__init__()
+        super().__init__()
 
     """
     A Cache Hierarchy incorporates any system components which manages

src/python/gem5/components/cachehierarchies/classic/abstract_classic_cache_hierarchy.py

@@ -39,7 +39,7 @@ class AbstractClassicCacheHierarchy(AbstractCacheHierarchy):
     """
 
     def __init__(self):
-        super(AbstractClassicCacheHierarchy, self).__init__()
+        super().__init__()
 
     @overrides(AbstractCacheHierarchy)
     def is_ruby(self) -> bool:

src/python/gem5/components/cachehierarchies/classic/caches/l1dcache.py

@@ -48,7 +48,7 @@ class L1DCache(Cache):
         writeback_clean: bool = True,
         PrefetcherCls: Type[BasePrefetcher] = StridePrefetcher,
     ):
-        super(L1DCache, self).__init__()
+        super().__init__()
         self.size = size
         self.assoc = assoc
         self.tag_latency = tag_latency

src/python/gem5/components/cachehierarchies/classic/caches/l1icache.py

@@ -48,7 +48,7 @@ class L1ICache(Cache):
         writeback_clean: bool = True,
         PrefetcherCls: Type[BasePrefetcher] = StridePrefetcher,
     ):
-        super(L1ICache, self).__init__()
+        super().__init__()
         self.size = size
         self.assoc = assoc
         self.tag_latency = tag_latency

src/python/gem5/components/cachehierarchies/classic/caches/l2cache.py

@@ -48,7 +48,7 @@ class L2Cache(Cache):
         writeback_clean: bool = True,
         PrefetcherCls: Type[BasePrefetcher] = StridePrefetcher,
     ):
-        super(L2Cache, self).__init__()
+        super().__init__()
         self.size = size
         self.assoc = assoc
         self.tag_latency = tag_latency

src/python/gem5/components/cachehierarchies/classic/caches/mmu_cache.py

@@ -44,7 +44,7 @@ class MMUCache(Cache):
         tgts_per_mshr: int = 12,
         writeback_clean: bool = True,
     ):
-        super(MMUCache, self).__init__()
+        super().__init__()
         self.size = size
         self.assoc = assoc
         self.tag_latency = tag_latency

src/python/gem5/components/cachehierarchies/classic/no_cache.py

@@ -82,7 +82,7 @@ class NoCache(AbstractClassicCacheHierarchy):
 
         :type membus: BaseXBar
         """
-        super(NoCache, self).__init__()
+        super().__init__()
         self.membus = membus
 
     @overrides(AbstractClassicCacheHierarchy)

src/python/gem5/components/cachehierarchies/ruby/abstract_ruby_cache_hierarchy.py

@@ -35,7 +35,7 @@ class AbstractRubyCacheHierarchy(AbstractCacheHierarchy):
     """
 
     def __init__(self):
-        super(AbstractRubyCacheHierarchy, self).__init__()
+        super().__init__()
 
     @overrides(AbstractCacheHierarchy)
     def is_ruby(self) -> bool:

src/python/gem5/components/cachehierarchies/ruby/caches/abstract_directory.py

@@ -40,7 +40,7 @@ class AbstractDirectory(Directory_Controller):
 
     def __init__(self, network, cache_line_size):
         """ """
-        super(AbstractDirectory, self).__init__()
+        super().__init__()
         self.version = self.versionCount()
         self._cache_line_size = cache_line_size
         self.connectQueues(network)

src/python/gem5/components/cachehierarchies/ruby/caches/abstract_dma_controller.py

@@ -39,7 +39,7 @@ class AbstractDMAController(DMA_Controller):
         return cls._version - 1
 
     def __init__(self, network, cache_line_size):
-        super(AbstractDMAController, self).__init__()
+        super().__init__()
         self.version = self.versionCount()
         self._cache_line_size = cache_line_size
         self.connectQueues(network)

src/python/gem5/components/cachehierarchies/ruby/caches/abstract_l1_cache.py

@@ -47,7 +47,7 @@ class AbstractL1Cache(L1Cache_Controller):
     # However, we need some way to set the index bits
     def __init__(self, network, cache_line_size):
         """ """
-        super(AbstractL1Cache, self).__init__()
+        super().__init__()
 
         self.version = self.versionCount()
         self._cache_line_size = cache_line_size

src/python/gem5/components/cachehierarchies/ruby/caches/abstract_l2_cache.py

@@ -39,7 +39,7 @@ class AbstractL2Cache(L2Cache_Controller):
         return cls._version - 1
 
     def __init__(self, network, cache_line_size):
-        super(AbstractL2Cache, self).__init__()
+        super().__init__()
 
         self.version = self.versionCount()
         self._cache_line_size = cache_line_size

src/python/gem5/components/cachehierarchies/ruby/caches/mesi_two_level/directory.py

@@ -36,7 +36,7 @@ from m5.objects import (
 class Directory(AbstractDirectory):
     def __init__(self, network, cache_line_size, mem_range, port):
 
-        super(Directory, self).__init__(network, cache_line_size)
+        super().__init__(network, cache_line_size)
         self.addr_ranges = [mem_range]
         self.directory = RubyDirectoryMemory()
         # Connect this directory to the memory side.

src/python/gem5/components/cachehierarchies/ruby/caches/mesi_two_level/dma_controller.py

@@ -32,7 +32,7 @@ from m5.objects import MessageBuffer
 
 class DMAController(AbstractDMAController):
     def __init__(self, network, cache_line_size):
-        super(DMAController, self).__init__(network, cache_line_size)
+        super().__init__(network, cache_line_size)
 
     @overrides(AbstractDMAController)
     def connectQueues(self, network):

src/python/gem5/components/cachehierarchies/ruby/caches/mesi_two_level/l1_cache.py

@@ -56,7 +56,7 @@ class L1Cache(AbstractL1Cache):
         """Creating L1 cache controller. Consist of both instruction
         and data cache.
         """
-        super(L1Cache, self).__init__(network, cache_line_size)
+        super().__init__(network, cache_line_size)
 
         # This is the cache memory object that stores the cache data and tags
         self.L1Icache = RubyCache(

src/python/gem5/components/cachehierarchies/ruby/caches/mesi_two_level/l2_cache.py

@@ -36,7 +36,7 @@ class L2Cache(AbstractL2Cache):
     def __init__(
         self, l2_size, l2_assoc, network, num_l2Caches, cache_line_size
     ):
-        super(L2Cache, self).__init__(network, cache_line_size)
+        super().__init__(network, cache_line_size)
 
         # This is the cache memory object that stores the cache data and tags
         self.L2cache = RubyCache(

src/python/gem5/components/cachehierarchies/ruby/caches/mi_example/directory.py

@@ -41,7 +41,7 @@ class Directory(AbstractDirectory):
 
     def __init__(self, network, cache_line_size, mem_range, port):
 
-        super(Directory, self).__init__(network, cache_line_size)
+        super().__init__(network, cache_line_size)
         self.addr_ranges = [mem_range]
         self.directory = RubyDirectoryMemory()
         # Connect this directory to the memory side.

src/python/gem5/components/cachehierarchies/ruby/caches/mi_example/dma_controller.py

@@ -37,7 +37,7 @@ class DMAController(AbstractDMAController):
 
     class DMAController(AbstractDMAController):
         def __init__(self, network, cache_line_size):
-            super(DMAController, self).__init__(network, cache_line_size)
+            super().__init__(network, cache_line_size)
 
     @overrides(AbstractDMAController)
     def connectQueues(self, network):

src/python/gem5/components/cachehierarchies/ruby/caches/mi_example/l1_cache.py

@@ -47,7 +47,7 @@ class L1Cache(AbstractL1Cache):
         target_isa: ISA,
         clk_domain: ClockDomain,
     ):
-        super(L1Cache, self).__init__(network, cache_line_size)
+        super().__init__(network, cache_line_size)
 
         self.cacheMemory = RubyCache(
             size=size, assoc=assoc, start_index_bit=self.getBlockSizeBits()

src/python/gem5/components/cachehierarchies/ruby/topologies/simple_pt2pt.py

@@ -31,7 +31,7 @@ class SimplePt2Pt(SimpleNetwork):
     """A simple point-to-point network. This doesn't not use garnet."""
 
     def __init__(self, ruby_system):
-        super(SimplePt2Pt, self).__init__()
+        super().__init__()
         self.netifs = []
 
         # TODO: These should be in a base class

src/python/gem5/components/memory/abstract_memory_system.py

@@ -37,7 +37,7 @@ class AbstractMemorySystem(SubSystem):
     __metaclass__ = ABCMeta
 
     def __init__(self) -> None:
-        super(AbstractMemorySystem, self).__init__()
+        super().__init__()
 
     @abstractmethod
     def incorporate_memory(self, board: AbstractBoard) -> None:

src/python/gem5/components/memory/dramsim_3.py

@@ -78,7 +78,7 @@ class DRAMSim3MemCtrl(DRAMsim3):
         :param mem_name: The name of the type  of memory to be configured.
         :param num_chnls: The number of channels.
         """
-        super(DRAMSim3MemCtrl, self).__init__()
+        super().__init__()
         ini_path, outdir = config_ds3(mem_name, num_chnls)
         self.configFile = ini_path
         self.filePath = outdir
@@ -94,7 +94,7 @@ class SingleChannel(AbstractMemorySystem):
         :param mem_name: The name of the type  of memory to be configured.
         :param num_chnls: The number of channels.
         """
-        super(SingleChannel, self).__init__()
+        super().__init__()
         self.mem_ctrl = DRAMSim3MemCtrl(mem_type, 1)
         self._size = toMemorySize(size)
         if not size:

src/python/gem5/components/processors/abstract_core.py

@@ -36,7 +36,7 @@ class AbstractCore(SubSystem):
     __metaclass__ = ABCMeta
 
     def __init__(self, cpu_type: CPUTypes):
-        super(AbstractCore, self).__init__()
+        super().__init__()
         if cpu_type == CPUTypes.KVM:
             requires(kvm_required=True)
         self._cpu_type = cpu_type

src/python/gem5/components/processors/abstract_generator_core.py

@@ -51,7 +51,7 @@ class AbstractGeneratorCore(AbstractCore):
         """
         # TODO: Remove the CPU Type parameter. This not needed.
         # Jira issue here: https://gem5.atlassian.net/browse/GEM5-1031
-        super(AbstractGeneratorCore, self).__init__(CPUTypes.TIMING)
+        super().__init__(CPUTypes.TIMING)
         self.port_end = PortTerminator()
 
     @overrides(AbstractCore)

src/python/gem5/components/processors/abstract_processor.py

@@ -38,7 +38,7 @@ class AbstractProcessor(SubSystem):
     __metaclass__ = ABCMeta
 
     def __init__(self, cores: List[AbstractCore]) -> None:
-        super(AbstractProcessor, self).__init__()
+        super().__init__()
         assert len(cores) > 0
 
         self.cores = cores

src/python/gem5/components/processors/complex_generator.py

@@ -34,7 +34,7 @@ from ..boards.abstract_board import AbstractBoard
 
 class ComplexGenerator(AbstractProcessor):
     def __init__(self, num_cores: int = 1) -> None:
-        super(ComplexGenerator, self).__init__(
+        super().__init__(
             cores=[ComplexGeneratorCore() for i in range(num_cores)]
         )
         """The complex generator

src/python/gem5/components/processors/complex_generator_core.py

@@ -82,7 +82,7 @@ class ComplexGeneratorCore(AbstractGeneratorCore):
         to create more complex traffics that consist of linear and random
         traffic in different phases.
         """
-        super(ComplexGeneratorCore, self).__init__()
+        super().__init__()
         self.generator = PyTrafficGen()
         self._traffic_params = []
         self._traffic = []

src/python/gem5/components/processors/gups_generator.py

@@ -57,7 +57,7 @@ class GUPSGenerator(AbstractProcessor):
         simulation. Pass zero to run the benchmark to completion (The amount of
         time it takes to simulate depends on )
         """
-        super(GUPSGenerator, self).__init__(
+        super().__init__(
             cores=[
                 GUPSGeneratorCore(
                     start_addr=start_addr,

src/python/gem5/components/processors/gups_generator_core.py

@@ -40,7 +40,7 @@ class GUPSGeneratorCore(AbstractGeneratorCore):
         """
         Create a GUPSGeneratorCore as the main generator.
         """
-        super(GUPSGeneratorCore, self).__init__()
+        super().__init__()
         self.generator = GUPSGen(
             start_addr=start_addr, mem_size=mem_size, update_limit=update_limit
         )

src/python/gem5/components/processors/gups_generator_ep.py

@@ -58,7 +58,7 @@ class GUPSGeneratorEP(AbstractProcessor):
         simulation. Pass zero to run the benchmark to completion (The amount of
         time it takes to simulate depends on )
         """
-        super(GUPSGeneratorEP, self).__init__(
+        super().__init__(
             cores=self._create_cores(
                 num_cores=num_cores,
                 start_addr=start_addr,

src/python/gem5/components/processors/gups_generator_par.py

@@ -57,7 +57,7 @@ class GUPSGeneratorPAR(AbstractProcessor):
         simulation. Pass zero to run the benchmark to completion (The amount of
         time it takes to simulate depends on )
         """
-        super(GUPSGeneratorPAR, self).__init__(
+        super().__init__(
             cores=self._create_cores(
                 num_cores=num_cores,
                 start_addr=start_addr,

src/python/gem5/components/processors/linear_generator.py

@@ -46,7 +46,7 @@ class LinearGenerator(AbstractProcessor):
         rd_perc: int = 100,
         data_limit: int = 0,
     ) -> None:
-        super(LinearGenerator, self).__init__(
+        super().__init__(
             cores=self._create_cores(
                 num_cores=num_cores,
                 duration=duration,

src/python/gem5/components/processors/linear_generator_core.py

@@ -47,7 +47,7 @@ class LinearGeneratorCore(AbstractGeneratorCore):
         rd_perc: int,
         data_limit: int,
     ) -> None:
-        super(LinearGeneratorCore, self).__init__()
+        super().__init__()
         """ The linear generator core interface.
 
         This class defines the interface for a generator core that will create

src/python/gem5/components/processors/random_generator.py

@@ -46,7 +46,7 @@ class RandomGenerator(AbstractProcessor):
         rd_perc: int = 100,
         data_limit: int = 0,
     ) -> None:
-        super(RandomGenerator, self).__init__(
+        super().__init__(
             cores=self._create_cores(
                 num_cores=num_cores,
                 duration=duration,

src/python/gem5/components/processors/random_generator_core.py

@@ -47,7 +47,7 @@ class RandomGeneratorCore(AbstractGeneratorCore):
         rd_perc: int,
         data_limit: int,
     ) -> None:
-        super(RandomGeneratorCore, self).__init__()
+        super().__init__()
         """ The random generator core interface.
 
         This class defines the interface for a generator core that will create

src/python/gem5/components/processors/simple_core.py

@@ -45,7 +45,7 @@ from m5.objects import (
 
 class SimpleCore(AbstractCore):
     def __init__(self, cpu_type: CPUTypes, core_id: int):
-        super(SimpleCore, self).__init__(cpu_type=cpu_type)
+        super().__init__(cpu_type=cpu_type)
 
         if cpu_type == CPUTypes.ATOMIC:
             self.core = AtomicSimpleCPU(cpu_id=core_id)

src/python/gem5/components/processors/simple_processor.py

@@ -42,7 +42,7 @@ class SimpleProcessor(AbstractProcessor):
     """
 
     def __init__(self, cpu_type: CPUTypes, num_cores: int) -> None:
-        super(SimpleProcessor, self).__init__(
+        super().__init__(
             cores=self._create_cores(
                 cpu_type=cpu_type,
                 num_cores=num_cores,

src/python/gem5/components/processors/simple_switchable_processor.py

@@ -75,7 +75,7 @@ class SimpleSwitchableProcessor(SwitchableProcessor):
             ],
         }
 
-        super(SimpleSwitchableProcessor, self).__init__(
+        super().__init__(
             switchable_cores=switchable_cores,
             starting_cores=self._start_key,
         )

src/python/gem5/components/processors/switchable_processor.py

@@ -82,7 +82,7 @@ class SwitchableProcessor(AbstractProcessor):
 
             self.kvm_vm = KvmVM()
 
-        super(SwitchableProcessor, self).__init__(cores=all_cores)
+        super().__init__(cores=all_cores)
 
     @overrides(AbstractProcessor)
     def incorporate_processor(self, board: AbstractBoard) -> None:

src/python/gem5/resources/resource.py

@@ -127,7 +127,7 @@ class Resource(AbstractResource):
 
         to_path = os.path.join(resource_directory, resource_name)
 
-        super(Resource, self).__init__(
+        super().__init__(
                     local_path=to_path,
                     metadata=get_resources_json_obj(resource_name))
         get_resource(

src/python/importer.py

@@ -31,7 +31,7 @@ import os
 
 class ByteCodeLoader(importlib.abc.Loader):
     def __init__(self, code):
-        super(ByteCodeLoader, self).__init__()
+        super().__init__()
         self.code = code
 
     def exec_module(self, module):

src/python/m5/SimObject.py

@@ -450,7 +450,7 @@ class MetaSimObject(type):
         if 'cxx_template_params' not in value_dict:
             value_dict['cxx_template_params'] = []
         cls_dict['_value_dict'] = value_dict
-        cls = super(MetaSimObject, mcls).__new__(mcls, name, bases, cls_dict)
+        cls = super().__new__(mcls, name, bases, cls_dict)
         if 'type' in value_dict:
             allClasses[name] = cls
         return cls
@@ -459,7 +459,7 @@ class MetaSimObject(type):
     def __init__(cls, name, bases, dict):
         # calls type.__init__()... I think that's a no-op, but leave
         # it here just in case it's not.
-        super(MetaSimObject, cls).__init__(name, bases, dict)
+        super().__init__(name, bases, dict)
 
         # initialize required attributes
 
@@ -1147,7 +1147,7 @@ class ParamInfo(object):
 
 class SimObjectCliWrapperException(Exception):
     def __init__(self, message):
-        super(Exception, self).__init__(message)
+        super().__init__(message)
 
 class SimObjectCliWrapper(object):
     """

src/python/m5/event.py

@@ -51,7 +51,7 @@ class EventWrapper(Event):
     """Helper class to wrap callable objects in an Event base class"""
 
     def __init__(self, func, **kwargs):
-        super(EventWrapper, self).__init__(**kwargs)
+        super().__init__(**kwargs)
 
         if not callable(func):
             raise RuntimeError("Can't wrap '%s', object is not callable" % \
@@ -68,7 +68,7 @@ class EventWrapper(Event):
 
 class ProgressEvent(Event):
     def __init__(self, eventq, period):
-        super(ProgressEvent, self).__init__()
+        super().__init__()
         self.period = int(period)
         self.eventq = eventq
         self.eventq.schedule(self, m5.curTick() + self.period)

src/python/m5/ext/pystats/group.py

@@ -133,8 +133,4 @@ class Vector(Group):
     https://gem5.atlassian.net/browse/GEM5-867.
     """
     def __init__(self, scalar_map: Mapping[str,Scalar]):
-        super(Vector, self).__init__(
-                                     type="Vector",
-                                     time_conversion=None,
-                                     **scalar_map,
-                                    )
+        super().__init__(type="Vector", time_conversion=None, **scalar_map)

src/python/m5/ext/pystats/jsonloader.py

@@ -47,9 +47,7 @@ class JsonLoader(json.JSONDecoder):
     """
 
     def __init__(self):
-        super(JsonLoader, self).__init__(self,
-            object_hook=self.__json_to_simstat
-        )
+        super().__init__(self, object_hook=self.__json_to_simstat)
 
     def __json_to_simstat(self, d: dict) -> Union[SimStat,Statistic,Group]:
         if 'type' in d:

src/python/m5/ext/pystats/statistic.py

@@ -62,13 +62,8 @@ class Scalar(Statistic):
                  unit: Optional[str] = None,
                  description: Optional[str] = None,
                  datatype: Optional[StorageType] = None):
-        super(Scalar, self).__init__(
-                                     value=value,
-                                     type="Scalar",
-                                     unit=unit,
-                                     description=description,
-                                     datatype=datatype,
-                                    )
+        super().__init__(value=value, type="Scalar", unit=unit,
+                description=description, datatype=datatype)
 
 class BaseScalarVector(Statistic):
     """
@@ -81,13 +76,8 @@ class BaseScalarVector(Statistic):
                  unit: Optional[str] = None,
                  description: Optional[str] = None,
                  datatype: Optional[StorageType] = None):
-        super(BaseScalarVector, self).__init__(
-                                           value=list(value),
-                                           type=type,
-                                           unit=unit,
-                                           description=description,
-                                           datatype=datatype,
-                                           )
+        super().__init__(value=list(value), type=type, unit=unit,
+                description=description, datatype=datatype)
 
     def mean(self) -> float:
         """
@@ -150,13 +140,8 @@ class Distribution(BaseScalarVector):
                  unit: Optional[str] = None,
                  description: Optional[str] = None,
                  datatype: Optional[StorageType] = None):
-        super(Distribution, self).__init__(
-                                           value=value,
-                                           type="Distribution",
-                                           unit=unit,
-                                           description=description,
-                                           datatype=datatype,
-                                           )
+        super().__init__(value=value, type="Distribution", unit=unit,
+                description=description, datatype=datatype)
 
         self.min = min
         self.max = max
@@ -190,13 +175,8 @@ class Accumulator(BaseScalarVector):
                  unit: Optional[str] = None,
                  description: Optional[str] = None,
                  datatype: Optional[StorageType] = None):
-        super(Accumulator, self).__init__(
-                                     value=value,
-                                     type="Accumulator",
-                                     unit=unit,
-                                     description=description,
-                                     datatype=datatype,
-                                    )
+        super().__init__(value=value, type="Accumulator", unit=unit,
+                description=description, datatype=datatype)
 
         self._count = count
         self.min = min

src/python/m5/options.py

@@ -106,23 +106,23 @@ class OptionParser(dict):
 
     def __getattr__(self, attr):
         if attr.startswith('_'):
-            return super(OptionParser, self).__getattribute__(attr)
+            return super().__getattribute__(attr)
 
         if attr in self:
             return self[attr]
 
-        return super(OptionParser, self).__getattribute__(attr)
+        return super().__getattribute__(attr)
 
     def __setattr__(self, attr, value):
         if attr.startswith('_'):
-            super(OptionParser, self).__setattr__(attr, value)
+            super().__setattr__(attr, value)
         elif attr in self._allopts:
             defaults = { attr : value }
             self.set_defaults(**defaults)
             if attr in self:
                 self[attr] = value
         else:
-            super(OptionParser, self).__setattr__(attr, value)
+            super().__setattr__(attr, value)
 
     def parse_args(self):
         opts,args = self._optparse.parse_args()

src/python/m5/params.py

@@ -81,7 +81,7 @@ allParams = {}
 
 class MetaParamValue(type):
     def __new__(mcls, name, bases, dct):
-        cls = super(MetaParamValue, mcls).__new__(mcls, name, bases, dct)
+        cls = super().__new__(mcls, name, bases, dct)
         if name in allParams:
             warn("%s already exists in allParams. This may be caused by the " \
                  "Python 2.7 compatibility layer." % (name, ))
@@ -301,7 +301,7 @@ class SimObjectVector(VectorParamValue):
             warn("SimObject %s already has a parent" % value.get_name() +\
                  " that is being overwritten by a SimObjectVector")
         value.set_parent(val.get_parent(), val._name)
-        super(SimObjectVector, self).__setitem__(key, value)
+        super().__setitem__(key, value)
 
     # Enumerate the params of each member of the SimObject vector. Creates
     # strings that will allow indexing into the vector by the python code and
@@ -347,7 +347,7 @@ class VectorParamDesc(ParamDesc):
     # how to set this vector parameter in the absence of a default
     # value.
     def example_str(self):
-        s = super(VectorParamDesc, self).example_str()
+        s = super().example_str()
         help_str = "[" + s + "," + s + ", ...]"
         return help_str
 
@@ -548,7 +548,7 @@ class NumericParamValue(ParamValue):
 # Metaclass for bounds-checked integer parameters.  See CheckedInt.
 class CheckedIntType(MetaParamValue):
     def __init__(cls, name, bases, dict):
-        super(CheckedIntType, cls).__init__(name, bases, dict)
+        super().__init__(name, bases, dict)
 
         # CheckedInt is an abstract base class, so we actually don't
         # want to do any processing on it... the rest of this code is
@@ -1094,7 +1094,7 @@ class IpNetmask(IpAddress):
         return value
 
     def __str__(self):
-        return "%s/%d" % (super(IpNetmask, self).__str__(), self.netmask)
+        return "%s/%d" % (super().__str__(), self.netmask)
 
     def __eq__(self, other):
         if isinstance(other, IpNetmask):
@@ -1168,7 +1168,7 @@ class IpWithPort(IpAddress):
         return value
 
     def __str__(self):
-        return "%s:%d" % (super(IpWithPort, self).__str__(), self.port)
+        return "%s:%d" % (super().__str__(), self.port)
 
     def __eq__(self, other):
         if isinstance(other, IpWithPort):
@@ -1287,7 +1287,7 @@ allEnums = {}
 class MetaEnum(MetaParamValue):
     def __new__(mcls, name, bases, dict):
 
-        cls = super(MetaEnum, mcls).__new__(mcls, name, bases, dict)
+        cls = super().__new__(mcls, name, bases, dict)
         allEnums[name] = cls
         return cls
 
@@ -1316,7 +1316,7 @@ class MetaEnum(MetaParamValue):
         else:
             cls.cxx_type = 'enums::%s' % name
 
-        super(MetaEnum, cls).__init__(name, bases, init_dict)
+        super().__init__(name, bases, init_dict)
 
     # Generate C++ class declaration for this enum type.
     # Note that we wrap the enum in a class/struct to act as a namespace,
@@ -1694,33 +1694,33 @@ class Voltage(Float):
 
     def __new__(cls, value):
         value = convert.toVoltage(value)
-        return super(cls, Voltage).__new__(cls, value)
+        return super().__new__(cls, value)
 
     def __init__(self, value):
         value = convert.toVoltage(value)
-        super(Voltage, self).__init__(value)
+        super().__init__(value)
 
 class Current(Float):
     ex_str = "1mA"
 
     def __new__(cls, value):
         value = convert.toCurrent(value)
-        return super(cls, Current).__new__(cls, value)
+        return super().__new__(cls, value)
 
     def __init__(self, value):
         value = convert.toCurrent(value)
-        super(Current, self).__init__(value)
+        super().__init__(value)
 
 class Energy(Float):
     ex_str = "1pJ"
 
     def __new__(cls, value):
         value = convert.toEnergy(value)
-        return super(cls, Energy).__new__(cls, value)
+        return super().__new__(cls, value)
 
     def __init__(self, value):
         value = convert.toEnergy(value)
-        super(Energy, self).__init__(value)
+        super().__init__(value)
 
 class Temperature(ParamValue):
     cxx_type = 'Temperature'
@@ -1770,7 +1770,7 @@ class NetworkBandwidth(float,ParamValue):
     def __new__(cls, value):
         # convert to bits per second
         val = convert.toNetworkBandwidth(value)
-        return super(cls, NetworkBandwidth).__new__(cls, val)
+        return super().__new__(cls, val)
 
     def __str__(self):
         return str(self.val)
@@ -1809,7 +1809,7 @@ class MemoryBandwidth(float,ParamValue):
     def __new__(cls, value):
         # convert to bytes per second
         val = convert.toMemoryBandwidth(value)
-        return super(cls, MemoryBandwidth).__new__(cls, val)
+        return super().__new__(cls, val)
 
     def __call__(self, value):
         val = convert.toMemoryBandwidth(value)
@@ -2180,13 +2180,12 @@ Port.compat('GEM5 REQUESTOR', 'GEM5 RESPONDER')
 class RequestPort(Port):
     # RequestPort("description")
     def __init__(self, desc):
-        super(RequestPort, self).__init__(
-                'GEM5 REQUESTOR', desc, is_source=True)
+        super().__init__('GEM5 REQUESTOR', desc, is_source=True)
 
 class ResponsePort(Port):
     # ResponsePort("description")
     def __init__(self, desc):
-        super(ResponsePort, self).__init__('GEM5 RESPONDER', desc)
+        super().__init__('GEM5 RESPONDER', desc)
 
 # VectorPort description object.  Like Port, but represents a vector
 # of connections (e.g., as on a XBar).
@@ -2197,13 +2196,12 @@ class VectorPort(Port):
 class VectorRequestPort(VectorPort):
     # VectorRequestPort("description")
     def __init__(self, desc):
-        super(VectorRequestPort, self).__init__(
-                'GEM5 REQUESTOR', desc, is_source=True)
+        super().__init__('GEM5 REQUESTOR', desc, is_source=True)
 
 class VectorResponsePort(VectorPort):
     # VectorResponsePort("description")
     def __init__(self, desc):
-        super(VectorResponsePort, self).__init__('GEM5 RESPONDER', desc)
+        super().__init__('GEM5 RESPONDER', desc)
 
 # Old names, maintained for compatibility.
 MasterPort = RequestPort

src/python/m5/proxy.py

@@ -63,7 +63,7 @@ class BaseProxy(object):
         if not attr.startswith('_'):
             raise AttributeError(
                 "cannot set attribute '%s' on proxy object" % attr)
-        super(BaseProxy, self).__setattr__(attr, value)
+        super().__setattr__(attr, value)
 
     def _gen_op(operation):
         def op(self, operand):
@@ -163,14 +163,14 @@ class BaseProxy(object):
 
 class AttrProxy(BaseProxy):
     def __init__(self, search_self, search_up, attr):
-        super(AttrProxy, self).__init__(search_self, search_up)
+        super().__init__(search_self, search_up)
         self._attr = attr
         self._modifiers = []
 
     def __getattr__(self, attr):
         # python uses __bases__ internally for inheritance
         if attr.startswith('_'):
-            return super(AttrProxy, self).__getattr__(self, attr)
+            return super().__getattr__(self, attr)
         if hasattr(self, '_pdesc'):
             raise AttributeError("Attribute reference on bound proxy "
                                 f"({self}.{attr})")

src/python/m5/util/__init__.py

@@ -76,7 +76,7 @@ class Singleton(type):
         if hasattr(cls, '_instance'):
             return cls._instance
 
-        cls._instance = super(Singleton, cls).__call__(*args, **kwargs)
+        cls._instance = super().__call__(*args, **kwargs)
         return cls._instance
 
 def addToPath(path):

src/python/m5/util/attrdict.py

@@ -31,17 +31,17 @@ class attrdict(dict):
     def __getattr__(self, attr):
         if attr in self:
             return self.__getitem__(attr)
-        return super(attrdict, self).__getattribute__(attr)
+        return super().__getattribute__(attr)
 
     def __setattr__(self, attr, value):
         if attr in dir(self) or attr.startswith('_'):
-            return super(attrdict, self).__setattr__(attr, value)
+            return super().__setattr__(attr, value)
         return self.__setitem__(attr, value)
 
     def __delattr__(self, attr):
         if attr in self:
             return self.__delitem__(attr)
-        return super(attrdict, self).__delattr__(attr)
+        return super().__delattr__(attr)
 
     def __getstate__(self):
         return dict(self)
@@ -54,7 +54,7 @@ class multiattrdict(attrdict):
     nested dictionaries."""
     def __getattr__(self, attr):
         try:
-            return super(multiattrdict, self).__getattr__(attr)
+            return super().__getattr__(attr)
         except AttributeError:
             if attr.startswith('_'):
                 raise
@@ -67,7 +67,7 @@ class optiondict(attrdict):
     """Modify attrdict so that a missing attribute just returns None"""
     def __getattr__(self, attr):
         try:
-            return super(optiondict, self).__getattr__(attr)
+            return super().__getattr__(attr)
         except AttributeError:
             return None
 

src/python/m5/util/fdthelper.py

@@ -53,7 +53,7 @@ class FdtPropertyWords(pyfdt.FdtPropertyWords):
         # Make sure all values are ints (use automatic base detection if the
         # type is str)
         words = [int(w, base=0) if type(w) == str else int(w) for w in words]
-        super(FdtPropertyWords, self).__init__(name, words)
+        super().__init__(name, words)
 
 class FdtPropertyStrings(pyfdt.FdtPropertyStrings):
     """Create a property with string values."""
@@ -62,7 +62,7 @@ class FdtPropertyStrings(pyfdt.FdtPropertyStrings):
         if type(strings) == str:
             strings = [strings]
         strings = [str(string) for string in strings] # Make all values strings
-        super(FdtPropertyStrings, self).__init__(name, strings)
+        super().__init__(name, strings)
 
 class FdtPropertyBytes(pyfdt.FdtPropertyBytes):
     """Create a property with integer (8-bit signed) values."""
@@ -74,7 +74,7 @@ class FdtPropertyBytes(pyfdt.FdtPropertyBytes):
         # type is str)
         values = [int(v, base=0)
                    if isinstance(v, str) else int(v) for v in values]
-        super(FdtPropertyBytes, self).__init__(name, values)
+        super().__init__(name, values)
 
 class FdtState(object):
     """Class for maintaining state while recursively generating a flattened
@@ -172,7 +172,7 @@ class FdtNode(pyfdt.FdtNode):
     def __init__(self, name, obj=None):
         """Create a new node and immediately set the phandle property, if obj
         is supplied"""
-        super(FdtNode, self).__init__(name)
+        super().__init__(name)
         if obj != None:
             self.appendPhandle(obj)
 
@@ -198,7 +198,7 @@ class FdtNode(pyfdt.FdtNode):
                 item.merge(subnode)
                 subnode = item
 
-            super(FdtNode, self).append(subnode)
+            super().append(subnode)
 
     def appendList(self, subnode_list):
         """Append all properties/nodes in the iterable."""
@@ -245,7 +245,7 @@ class Fdt(pyfdt.Fdt):
     def add_rootnode(self, rootnode, prenops=None, postnops=None):
         """First sort the device tree, so that properties are before nodes."""
         rootnode = self.sortNodes(rootnode)
-        super(Fdt, self).add_rootnode(rootnode, prenops, postnops)
+        super().add_rootnode(rootnode, prenops, postnops)
 
     def writeDtbFile(self, filename):
         """Convert the device tree to DTB and write to a file."""