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dev-amdgpu: Fix interrupt call for release mem

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Both the client id and source id are incorrect for the release mem CP
packet. This changeset sets both to the correct value and adds asserts
that the value is declared in the client ID and source ID enums.

Change-Id: I4cc6c3a5f2a482e8f7dcd2a529c4a69bf71742c0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/63177
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
This commit is contained in:
Matthew Poremba
2022-09-05 10:36:13 -07:00
parent 9f5c0f2822
commit b623d26543
3 changed files with 10 additions and 2 deletions
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6
src/dev/amdgpu/interrupt_handler.cc
View File

@@ -77,6 +77,12 @@ AMDGPUInterruptHandler::prepareInterruptCookie(ContextID cntxt_id,
uint32_t client_id,
uint32_t source_id)
{
assert(client_id == SOC15_IH_CLIENTID_RLC ||
client_id == SOC15_IH_CLIENTID_SDMA0 ||
client_id == SOC15_IH_CLIENTID_SDMA1 ||
client_id == SOC15_IH_CLIENTID_GRBM_CP);
assert(source_id == CP_EOP || source_id == TRAP_ID);
/**
* Setup the fields in the interrupt cookie (see header file for more
* detail on the fields). The timestamp here is a bogus value. It seems

4
src/dev/amdgpu/interrupt_handler.hh
View File

@@ -57,11 +57,13 @@ enum soc15_ih_clientid
{
SOC15_IH_CLIENTID_RLC = 0x07,
SOC15_IH_CLIENTID_SDMA0 = 0x08,
SOC15_IH_CLIENTID_SDMA1 = 0x09
SOC15_IH_CLIENTID_SDMA1 = 0x09,
SOC15_IH_CLIENTID_GRBM_CP = 0x14
};
enum ihSourceId
{
CP_EOP = 181,
TRAP_ID = 224
};

2
src/dev/amdgpu/pm4_packet_processor.cc
View File

@@ -499,7 +499,7 @@ PM4PacketProcessor::releaseMemDone(PM4Queue *q, PM4ReleaseMem *pkt, Addr addr)
// format specified in PM4ReleaseMem pkt.
uint32_t ringId = (q->me() << 6) | (q->pipe() << 4) | q->queue();
gpuDevice->getIH()->prepareInterruptCookie(pkt->intCtxId, ringId,
SOC15_IH_CLIENTID_RLC, TRAP_ID);
SOC15_IH_CLIENTID_GRBM_CP, CP_EOP);
gpuDevice->getIH()->submitInterruptCookie();
}