arch,cpu: Move buildRetPC into the StaticInst class.

This was an inline function defined for each ISA, but really it makes
more sense for it to be defined by the instruction classes. The actual
return address for any given instruction can best be calculated when you
know what that instruction actually does, and also the instructions will
know about ISA level PC management.

Change-Id: I2c5203aefa90f2f26ecd94e82b925c6b552e33d3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39324
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/arch/arm/insts/static_inst.hh

@@ -201,6 +201,14 @@ class ArmStaticInst : public StaticInst
 
     uint64_t getEMI() const override { return machInst; }
 
+    PCState
+    buildRetPC(const PCState &curPC, const PCState &callPC) const override
+    {
+        PCState retPC = callPC;
+        retPC.uEnd();
+        return retPC;
+    }
+
     std::string generateDisassembly(
             Addr pc, const Loader::SymbolTable *symtab) const override;
 

src/arch/arm/utility.hh

@@ -56,14 +56,6 @@ class ArmSystem;
 
 namespace ArmISA {
 
-inline PCState
-buildRetPC(const PCState &curPC, const PCState &callPC)
-{
-    PCState retPC = callPC;
-    retPC.uEnd();
-    return retPC;
-}
-
 inline bool
 testPredicate(uint32_t nz, uint32_t c, uint32_t v, ConditionCode code)
 {

src/arch/mips/isa/base.isa

@@ -64,6 +64,15 @@ output header {{
             pc.advance();
         }
 
+        PCState
+        buildRetPC(const PCState &curPC, const PCState &callPC) const override
+        {
+            PCState ret = callPC;
+            ret.advance();
+            ret.pc(curPC.npc());
+            return ret;
+        }
+
         size_t
         asBytes(void *buf, size_t max_size) override
         {

src/arch/mips/utility.hh

@@ -40,15 +40,6 @@ class ThreadContext;
 
 namespace MipsISA {
 
-inline PCState
-buildRetPC(const PCState &curPC, const PCState &callPC)
-{
-    PCState ret = callPC;
-    ret.advance();
-    ret.pc(curPC.npc());
-    return ret;
-}
-
 ////////////////////////////////////////////////////////////////////////
 //
 // Floating Point Utility Functions

src/arch/power/insts/static_inst.hh

@@ -69,6 +69,14 @@ class PowerStaticInst : public StaticInst
         pcState.advance();
     }
 
+    PCState
+    buildRetPC(const PCState &curPC, const PCState &callPC) const override
+    {
+        PCState retPC = callPC;
+        retPC.advance();
+        return retPC;
+    }
+
     size_t
     asBytes(void *buf, size_t max_size) override
     {

src/arch/power/utility.hh

@@ -37,14 +37,6 @@
 
 namespace PowerISA {
 
-inline PCState
-buildRetPC(const PCState &curPC, const PCState &callPC)
-{
-    PCState retPC = callPC;
-    retPC.advance();
-    return retPC;
-}
-
 void copyRegs(ThreadContext *src, ThreadContext *dest);
 
 static inline void

src/arch/riscv/insts/static_inst.hh

@@ -56,6 +56,15 @@ class RiscvStaticInst : public StaticInst
 
     void advancePC(PCState &pc) const override { pc.advance(); }
 
+    PCState
+    buildRetPC(const PCState &curPC, const PCState &callPC) const override
+    {
+        PCState retPC = callPC;
+        retPC.advance();
+        retPC.pc(curPC.npc());
+        return retPC;
+    }
+
     size_t
     asBytes(void *buf, size_t size) override
     {

src/arch/riscv/utility.hh

@@ -98,15 +98,6 @@ issignalingnan<double>(double val)
         && (reinterpret_cast<uint64_t&>(val)&0x0004000000000000ULL);
 }
 
-inline PCState
-buildRetPC(const PCState &curPC, const PCState &callPC)
-{
-    PCState retPC = callPC;
-    retPC.advance();
-    retPC.pc(curPC.npc());
-    return retPC;
-}
-
 inline void
 copyRegs(ThreadContext *src, ThreadContext *dest)
 {

src/arch/sparc/insts/static_inst.hh

@@ -116,6 +116,15 @@ class SparcStaticInst : public StaticInst
     {
         return simpleAsBytes(buf, size, machInst);
     }
+
+    PCState
+    buildRetPC(const PCState &curPC, const PCState &callPC) const override
+    {
+        PCState ret = callPC;
+        ret.uEnd();
+        ret.pc(curPC.npc());
+        return ret;
+    }
 };
 
 }

src/arch/sparc/utility.hh

@@ -41,15 +41,6 @@
 namespace SparcISA
 {
 
-inline PCState
-buildRetPC(const PCState &curPC, const PCState &callPC)
-{
-    PCState ret = callPC;
-    ret.uEnd();
-    ret.pc(curPC.npc());
-    return ret;
-}
-
 void copyRegs(ThreadContext *src, ThreadContext *dest);
 
 void copyMiscRegs(ThreadContext *src, ThreadContext *dest);

src/arch/x86/insts/static_inst.hh

@@ -185,6 +185,14 @@ class X86StaticInst : public StaticInst
     {
         pcState.advance();
     }
+
+    PCState
+    buildRetPC(const PCState &curPC, const PCState &callPC) const override
+    {
+        PCState retPC = callPC;
+        retPC.uEnd();
+        return retPC;
+    }
 };
 }
 

src/arch/x86/utility.hh

@@ -44,15 +44,6 @@
 
 namespace X86ISA
 {
-
-    inline PCState
-    buildRetPC(const PCState &curPC, const PCState &callPC)
-    {
-        PCState retPC = callPC;
-        retPC.uEnd();
-        return retPC;
-    }
-
     void copyRegs(ThreadContext *src, ThreadContext *dest);
 
     void copyMiscRegs(ThreadContext *src, ThreadContext *dest);

src/cpu/pred/bpred_unit.cc

@@ -170,7 +170,7 @@ BPredUnit::predict(const StaticInstPtr &inst, const InstSeqNum &seqNum,
             // If it's a function return call, then look up the address
             // in the RAS.
             TheISA::PCState rasTop = RAS[tid].top();
-            target = TheISA::buildRetPC(pc, rasTop);
+            target = inst->buildRetPC(pc, rasTop);
 
             // Record the top entry of the RAS, and its index.
             predict_record.usedRAS = true;

src/cpu/static_inst.hh

@@ -325,6 +325,13 @@ class StaticInst : public RefCounted, public StaticInstFlags
 
     virtual void advancePC(TheISA::PCState &pcState) const = 0;
 
+    virtual TheISA::PCState
+    buildRetPC(const TheISA::PCState &curPC,
+            const TheISA::PCState &callPC) const
+    {
+        panic("buildRetPC not defined!");
+    }
+
     /**
      * Return the microop that goes with a particular micropc. This should
      * only be defined/used in macroops which will contain microops