diff --git a/src/arch/arm/insts/static_inst.hh b/src/arch/arm/insts/static_inst.hh
index b78f64a8d7..2693f1e1f6 100644
--- a/src/arch/arm/insts/static_inst.hh
+++ b/src/arch/arm/insts/static_inst.hh
@@ -201,6 +201,14 @@ class ArmStaticInst : public StaticInst
 
     uint64_t getEMI() const override { return machInst; }
 
+    PCState
+    buildRetPC(const PCState &curPC, const PCState &callPC) const override
+    {
+        PCState retPC = callPC;
+        retPC.uEnd();
+        return retPC;
+    }
+
     std::string generateDisassembly(
             Addr pc, const Loader::SymbolTable *symtab) const override;
 
diff --git a/src/arch/arm/utility.hh b/src/arch/arm/utility.hh
index 1a12b6a205..d38433e93a 100644
--- a/src/arch/arm/utility.hh
+++ b/src/arch/arm/utility.hh
@@ -56,14 +56,6 @@ class ArmSystem;
 
 namespace ArmISA {
 
-inline PCState
-buildRetPC(const PCState &curPC, const PCState &callPC)
-{
-    PCState retPC = callPC;
-    retPC.uEnd();
-    return retPC;
-}
-
 inline bool
 testPredicate(uint32_t nz, uint32_t c, uint32_t v, ConditionCode code)
 {
diff --git a/src/arch/mips/isa/base.isa b/src/arch/mips/isa/base.isa
index 0175bccfc9..45f873fdbb 100644
--- a/src/arch/mips/isa/base.isa
+++ b/src/arch/mips/isa/base.isa
@@ -64,6 +64,15 @@ output header {{
             pc.advance();
         }
 
+        PCState
+        buildRetPC(const PCState &curPC, const PCState &callPC) const override
+        {
+            PCState ret = callPC;
+            ret.advance();
+            ret.pc(curPC.npc());
+            return ret;
+        }
+
         size_t
         asBytes(void *buf, size_t max_size) override
         {
diff --git a/src/arch/mips/utility.hh b/src/arch/mips/utility.hh
index 6fb211def7..eb7f74a914 100644
--- a/src/arch/mips/utility.hh
+++ b/src/arch/mips/utility.hh
@@ -40,15 +40,6 @@ class ThreadContext;
 
 namespace MipsISA {
 
-inline PCState
-buildRetPC(const PCState &curPC, const PCState &callPC)
-{
-    PCState ret = callPC;
-    ret.advance();
-    ret.pc(curPC.npc());
-    return ret;
-}
-
 ////////////////////////////////////////////////////////////////////////
 //
 // Floating Point Utility Functions
diff --git a/src/arch/power/insts/static_inst.hh b/src/arch/power/insts/static_inst.hh
index 403d358e23..585e8a389e 100644
--- a/src/arch/power/insts/static_inst.hh
+++ b/src/arch/power/insts/static_inst.hh
@@ -69,6 +69,14 @@ class PowerStaticInst : public StaticInst
         pcState.advance();
     }
 
+    PCState
+    buildRetPC(const PCState &curPC, const PCState &callPC) const override
+    {
+        PCState retPC = callPC;
+        retPC.advance();
+        return retPC;
+    }
+
     size_t
     asBytes(void *buf, size_t max_size) override
     {
diff --git a/src/arch/power/utility.hh b/src/arch/power/utility.hh
index bdb201d23d..7c892d4110 100644
--- a/src/arch/power/utility.hh
+++ b/src/arch/power/utility.hh
@@ -37,14 +37,6 @@
 
 namespace PowerISA {
 
-inline PCState
-buildRetPC(const PCState &curPC, const PCState &callPC)
-{
-    PCState retPC = callPC;
-    retPC.advance();
-    return retPC;
-}
-
 void copyRegs(ThreadContext *src, ThreadContext *dest);
 
 static inline void
diff --git a/src/arch/riscv/insts/static_inst.hh b/src/arch/riscv/insts/static_inst.hh
index 1c57cc7f4e..1c9c6160c8 100644
--- a/src/arch/riscv/insts/static_inst.hh
+++ b/src/arch/riscv/insts/static_inst.hh
@@ -56,6 +56,15 @@ class RiscvStaticInst : public StaticInst
 
     void advancePC(PCState &pc) const override { pc.advance(); }
 
+    PCState
+    buildRetPC(const PCState &curPC, const PCState &callPC) const override
+    {
+        PCState retPC = callPC;
+        retPC.advance();
+        retPC.pc(curPC.npc());
+        return retPC;
+    }
+
     size_t
     asBytes(void *buf, size_t size) override
     {
diff --git a/src/arch/riscv/utility.hh b/src/arch/riscv/utility.hh
index 32cf0464fc..3bbbd716e2 100644
--- a/src/arch/riscv/utility.hh
+++ b/src/arch/riscv/utility.hh
@@ -98,15 +98,6 @@ issignalingnan<double>(double val)
         && (reinterpret_cast<uint64_t&>(val)&0x0004000000000000ULL);
 }
 
-inline PCState
-buildRetPC(const PCState &curPC, const PCState &callPC)
-{
-    PCState retPC = callPC;
-    retPC.advance();
-    retPC.pc(curPC.npc());
-    return retPC;
-}
-
 inline void
 copyRegs(ThreadContext *src, ThreadContext *dest)
 {
diff --git a/src/arch/sparc/insts/static_inst.hh b/src/arch/sparc/insts/static_inst.hh
index 43d8d3d86a..ffcf135936 100644
--- a/src/arch/sparc/insts/static_inst.hh
+++ b/src/arch/sparc/insts/static_inst.hh
@@ -116,6 +116,15 @@ class SparcStaticInst : public StaticInst
     {
         return simpleAsBytes(buf, size, machInst);
     }
+
+    PCState
+    buildRetPC(const PCState &curPC, const PCState &callPC) const override
+    {
+        PCState ret = callPC;
+        ret.uEnd();
+        ret.pc(curPC.npc());
+        return ret;
+    }
 };
 
 }
diff --git a/src/arch/sparc/utility.hh b/src/arch/sparc/utility.hh
index 053258fd07..e61989a8f7 100644
--- a/src/arch/sparc/utility.hh
+++ b/src/arch/sparc/utility.hh
@@ -41,15 +41,6 @@
 namespace SparcISA
 {
 
-inline PCState
-buildRetPC(const PCState &curPC, const PCState &callPC)
-{
-    PCState ret = callPC;
-    ret.uEnd();
-    ret.pc(curPC.npc());
-    return ret;
-}
-
 void copyRegs(ThreadContext *src, ThreadContext *dest);
 
 void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
diff --git a/src/arch/x86/insts/static_inst.hh b/src/arch/x86/insts/static_inst.hh
index 64c56eac7f..52f8048e23 100644
--- a/src/arch/x86/insts/static_inst.hh
+++ b/src/arch/x86/insts/static_inst.hh
@@ -185,6 +185,14 @@ class X86StaticInst : public StaticInst
     {
         pcState.advance();
     }
+
+    PCState
+    buildRetPC(const PCState &curPC, const PCState &callPC) const override
+    {
+        PCState retPC = callPC;
+        retPC.uEnd();
+        return retPC;
+    }
 };
 }
 
diff --git a/src/arch/x86/utility.hh b/src/arch/x86/utility.hh
index 79274ca577..a7c2dfccb7 100644
--- a/src/arch/x86/utility.hh
+++ b/src/arch/x86/utility.hh
@@ -44,15 +44,6 @@
 
 namespace X86ISA
 {
-
-    inline PCState
-    buildRetPC(const PCState &curPC, const PCState &callPC)
-    {
-        PCState retPC = callPC;
-        retPC.uEnd();
-        return retPC;
-    }
-
     void copyRegs(ThreadContext *src, ThreadContext *dest);
 
     void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
diff --git a/src/cpu/pred/bpred_unit.cc b/src/cpu/pred/bpred_unit.cc
index ff8c885f39..b25d11577a 100644
--- a/src/cpu/pred/bpred_unit.cc
+++ b/src/cpu/pred/bpred_unit.cc
@@ -170,7 +170,7 @@ BPredUnit::predict(const StaticInstPtr &inst, const InstSeqNum &seqNum,
             // If it's a function return call, then look up the address
             // in the RAS.
             TheISA::PCState rasTop = RAS[tid].top();
-            target = TheISA::buildRetPC(pc, rasTop);
+            target = inst->buildRetPC(pc, rasTop);
 
             // Record the top entry of the RAS, and its index.
             predict_record.usedRAS = true;
diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh
index b01471938f..0bd2e50bbc 100644
--- a/src/cpu/static_inst.hh
+++ b/src/cpu/static_inst.hh
@@ -325,6 +325,13 @@ class StaticInst : public RefCounted, public StaticInstFlags
 
     virtual void advancePC(TheISA::PCState &pcState) const = 0;
 
+    virtual TheISA::PCState
+    buildRetPC(const TheISA::PCState &curPC,
+            const TheISA::PCState &callPC) const
+    {
+        panic("buildRetPC not defined!");
+    }
+
     /**
      * Return the microop that goes with a particular micropc. This should
      * only be defined/used in macroops which will contain microops