arch-vega,arch-gcn3: Add support for VCC_HI as scalar source
Currently there is only support for VCC_LO as a scalar source. Add support for VCC_HI as well. The op selector symbol is also changed to be vcc_hi/vcc_lo as it is in disassembly from LLVM. Change-Id: I19ea8e23873049c33ffe2eb4ec8504a18f371c0e Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/61329 Reviewed-by: Matt Sinclair <mattdsinclair.wisc@gmail.com> Reviewed-by: Jason Lowe-Power <power.jg@gmail.com> Maintainer: Jason Lowe-Power <power.jg@gmail.com> Tested-by: kokoro <noreply+kokoro@google.com>
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@@ -654,7 +654,10 @@ namespace Gcn3ISA
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ComputeUnit *cu = _gpuDynInst->computeUnit();
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int sgprIdx(-1);
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if (_opIdx == REG_VCC_LO) {
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if (_opIdx == REG_VCC_HI) {
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sgprIdx = cu->registerManager
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->mapSgpr(wf, wf->reservedScalarRegs - 1 + dword);
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} else if (_opIdx == REG_VCC_LO) {
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sgprIdx = cu->registerManager
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->mapSgpr(wf, wf->reservedScalarRegs - 2 + dword);
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} else if (_opIdx == REG_FLAT_SCRATCH_HI) {
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@@ -75,7 +75,10 @@ namespace Gcn3ISA
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reg_sym = "flat_scratch_hi";
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break;
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case REG_VCC_LO:
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reg_sym = "vcc";
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reg_sym = "vcc_lo";
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break;
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case REG_VCC_HI:
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reg_sym = "vcc_hi";
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break;
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case REG_M0:
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reg_sym = "m0";
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@@ -644,7 +644,10 @@ namespace VegaISA
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ComputeUnit *cu = _gpuDynInst->computeUnit();
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int sgprIdx(-1);
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if (_opIdx == REG_VCC_LO) {
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if (_opIdx == REG_VCC_HI) {
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sgprIdx = cu->registerManager
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->mapSgpr(wf, wf->reservedScalarRegs - 1 + dword);
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} else if (_opIdx == REG_VCC_LO) {
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sgprIdx = cu->registerManager
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->mapSgpr(wf, wf->reservedScalarRegs - 2 + dword);
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} else if (_opIdx == REG_FLAT_SCRATCH_HI) {
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@@ -75,7 +75,10 @@ namespace VegaISA
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reg_sym = "flat_scratch_hi";
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break;
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case REG_VCC_LO:
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reg_sym = "vcc";
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reg_sym = "vcc_lo";
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break;
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case REG_VCC_HI:
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reg_sym = "vcc_hi";
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break;
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case REG_M0:
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reg_sym = "m0";
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