arch-power: Add bit permute instructions

This adds the following instructions.
  * Bit Permute Doubleword (bpermd)

Change-Id: Iab3cc6729b9d59c95e29b4f1d3e2c0eb48fde917
Signed-off-by: Sandipan Das <sandipan@linux.ibm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40923
Reviewed-by: Boris Shingarov <shingarov@labware.com>
Maintainer: Boris Shingarov <shingarov@labware.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/arch/power/isa/decoder.isa

@@ -398,6 +398,17 @@ decode PO default Unknown::unknown() {
         246: MiscOp::dcbtst({{ }});
         247: StoreIndexUpdateOp::stbux({{ Mem_ub = Rs_ub; }});
 
+        252: IntLogicOp::bpermd({{
+            uint64_t res = 0;
+            for (int i = 0; i < 8; ++i) {
+                int index = (Rs >> (i * 8)) & 0xff;
+                if ((index < 64) && bits(Rb, 63 - index)) {
+                        res |= 1 << i;
+                }
+            }
+            Ra = res;
+        }});
+
         format IntArithOp {
             265: modud({{
                 uint64_t src1 = Ra;