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arch-power: Add parity instructions

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This adds the following instructions.
  * Parity Word (prtyw)
  * Parity Doubleword (prtyd)

Change-Id: Ic102d722f1bc8cea4921ddbf9febfa0e7c0f892e
Signed-off-by: Sandipan Das <sandipan@linux.ibm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40922
Reviewed-by: Boris Shingarov <shingarov@labware.com>
Maintainer: Boris Shingarov <shingarov@labware.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Sandipan Das
2021-02-06 17:21:30 +05:30
parent f9653e7685
commit 7a4ffa7cd5
1 changed files with 17 additions and 0 deletions
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17
src/arch/power/isa/decoder.isa
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@@ -328,11 +328,28 @@ decode PO default Unknown::unknown() {
151: stwx({{ Mem_uw = Rs_uw; }});
}
154: IntLogicOp::prtyw({{
uint64_t res = Rs;
res = res ^ (res >> 16);
res = res ^ (res >> 8);
res = res & 0x100000001;
Ra = res;
}});
format StoreIndexUpdateOp {
181: stdux({{ Mem = Rs; }});
183: stwux({{ Mem_uw = Rs_uw; }});
}
186: IntLogicOp::prtyd({{
uint64_t res = Rs;
res = res ^ (res >> 32);
res = res ^ (res >> 16);
res = res ^ (res >> 8);
res = res & 0x1;
Ra = res;
}});
192: IntCompOp::cmprb({{
uint32_t src1 = Ra_ub;
uint32_t src2 = Rb_uw;