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Revert "arch-arm: Use src/base/fenv.hh instead of raw fenv.h."

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This reverts commit 8ff1dd9c9b.

Reason for revert: gerrit allowed rebasing this out of the original order, but it doesn't build without another uncommitted change going in first.

Change-Id: I678a22154b539691a962b4a686333cacf98731de
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44065
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Gabe Black
2021-04-03 07:54:39 +00:00
parent 0d569c559b
commit ab19f3c560
2 changed files with 11 additions and 14 deletions
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9
src/arch/arm/isa/includes.isa
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@@ -108,12 +108,17 @@ output exec {{
#include "arch/generic/memhelpers.hh"
#include "base/condcodes.hh"
#include "base/crc.hh"
#include "base/fenv.hh"
#include "cpu/base.hh"
#include "sim/pseudo_inst.hh"
#if defined(linux)
#include <fenv.h>
#endif
#include "debug/Arm.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#include "sim/pseudo_inst.hh"
#include "sim/sim_exit.hh"
using namespace ArmISA;

16
src/arch/arm/isa/insts/fp.isa
View File

@@ -1106,13 +1106,11 @@ let {{
FPSCR fpscr = (FPSCR) FpscrExc;
vfpFlushToZero(fpscr, FpOp1);
VfpSavedState state = prepFpState(fpscr.rMode);
Gem5::RoundingMode old_rm = Gem5::getFpRound();
Gem5::setFpRound(Gem5::RoundingMode::TowardZero);
fesetround(FeRoundZero);
__asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1));
FpDest_uw = vfpFpToFixed<float>(
FpOp1, false, 32, 0, true, {round_mode});
__asm__ __volatile__("" :: "m" (FpDest_uw));
Gem5::setFpRound(old_rm);
finishVfp(fpscr, state, fpscr.fz);
FpscrExc = fpscr;
'''
@@ -1124,13 +1122,11 @@ let {{
double cOp1 = dbl(FpOp1P0_uw, FpOp1P1_uw);
vfpFlushToZero(fpscr, cOp1);
VfpSavedState state = prepFpState(fpscr.rMode);
Gem5::RoundingMode old_rm = Gem5::getFpRound();
Gem5::setFpRound(Gem5::RoundingMode::TowardZero);
fesetround(FeRoundZero);
__asm__ __volatile__("" : "=m" (cOp1) : "m" (cOp1));
uint64_t result = vfpFpToFixed<double>(
cOp1, false, 32, 0, true, {round_mode});
__asm__ __volatile__("" :: "m" (result));
Gem5::setFpRound(old_rm);
finishVfp(fpscr, state, fpscr.fz);
FpDestP0_uw = result;
FpscrExc = fpscr;
@@ -1142,13 +1138,11 @@ let {{
FPSCR fpscr = (FPSCR) FpscrExc;
vfpFlushToZero(fpscr, FpOp1);
VfpSavedState state = prepFpState(fpscr.rMode);
Gem5::RoundingMode old_rm = Gem5::getFpRound();
Gem5::setFpRound(Gem5::RoundingMode::TowardZero);
fesetround(FeRoundZero);
__asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1));
FpDest_sw = vfpFpToFixed<float>(
FpOp1, true, 32, 0, true, {round_mode});
__asm__ __volatile__("" :: "m" (FpDest_sw));
Gem5::setFpRound(old_rm);
finishVfp(fpscr, state, fpscr.fz);
FpscrExc = fpscr;
'''
@@ -1160,13 +1154,11 @@ let {{
double cOp1 = dbl(FpOp1P0_uw, FpOp1P1_uw);
vfpFlushToZero(fpscr, cOp1);
VfpSavedState state = prepFpState(fpscr.rMode);
Gem5::RoundingMode old_rm = Gem5::getFpRound();
Gem5::setFpRound(Gem5::RoundingMode::TowardZero);
fesetround(FeRoundZero);
__asm__ __volatile__("" : "=m" (cOp1) : "m" (cOp1));
int64_t result = vfpFpToFixed<double>(
cOp1, true, 32, 0, true, {round_mode});
__asm__ __volatile__("" :: "m" (result));
Gem5::setFpRound(old_rm);
finishVfp(fpscr, state, fpscr.fz);
FpDestP0_uw = result;
FpscrExc = fpscr;