diff --git a/src/arch/arm/isa/includes.isa b/src/arch/arm/isa/includes.isa
index a09655b65f..16d4c1c866 100644
--- a/src/arch/arm/isa/includes.isa
+++ b/src/arch/arm/isa/includes.isa
@@ -108,12 +108,17 @@ output exec {{
 #include "arch/generic/memhelpers.hh"
 #include "base/condcodes.hh"
 #include "base/crc.hh"
-#include "base/fenv.hh"
 #include "cpu/base.hh"
+#include "sim/pseudo_inst.hh"
+
+#if defined(linux)
+#include <fenv.h>
+
+#endif
+
 #include "debug/Arm.hh"
 #include "mem/packet.hh"
 #include "mem/packet_access.hh"
-#include "sim/pseudo_inst.hh"
 #include "sim/sim_exit.hh"
 
 using namespace ArmISA;
diff --git a/src/arch/arm/isa/insts/fp.isa b/src/arch/arm/isa/insts/fp.isa
index a32b396017..07be0e19ab 100644
--- a/src/arch/arm/isa/insts/fp.isa
+++ b/src/arch/arm/isa/insts/fp.isa
@@ -1106,13 +1106,11 @@ let {{
         FPSCR fpscr = (FPSCR) FpscrExc;
         vfpFlushToZero(fpscr, FpOp1);
         VfpSavedState state = prepFpState(fpscr.rMode);
-        Gem5::RoundingMode old_rm = Gem5::getFpRound();
-        Gem5::setFpRound(Gem5::RoundingMode::TowardZero);
+        fesetround(FeRoundZero);
         __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1));
         FpDest_uw = vfpFpToFixed<float>(
             FpOp1, false, 32, 0, true, {round_mode});
         __asm__ __volatile__("" :: "m" (FpDest_uw));
-        Gem5::setFpRound(old_rm);
         finishVfp(fpscr, state, fpscr.fz);
         FpscrExc = fpscr;
     '''
@@ -1124,13 +1122,11 @@ let {{
         double cOp1 = dbl(FpOp1P0_uw, FpOp1P1_uw);
         vfpFlushToZero(fpscr, cOp1);
         VfpSavedState state = prepFpState(fpscr.rMode);
-        Gem5::RoundingMode old_rm = Gem5::getFpRound();
-        Gem5::setFpRound(Gem5::RoundingMode::TowardZero);
+        fesetround(FeRoundZero);
         __asm__ __volatile__("" : "=m" (cOp1) : "m" (cOp1));
         uint64_t result = vfpFpToFixed<double>(
             cOp1, false, 32, 0, true, {round_mode});
         __asm__ __volatile__("" :: "m" (result));
-        Gem5::setFpRound(old_rm);
         finishVfp(fpscr, state, fpscr.fz);
         FpDestP0_uw = result;
         FpscrExc = fpscr;
@@ -1142,13 +1138,11 @@ let {{
         FPSCR fpscr = (FPSCR) FpscrExc;
         vfpFlushToZero(fpscr, FpOp1);
         VfpSavedState state = prepFpState(fpscr.rMode);
-        Gem5::RoundingMode old_rm = Gem5::getFpRound();
-        Gem5::setFpRound(Gem5::RoundingMode::TowardZero);
+        fesetround(FeRoundZero);
         __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1));
         FpDest_sw = vfpFpToFixed<float>(
             FpOp1, true, 32, 0, true, {round_mode});
         __asm__ __volatile__("" :: "m" (FpDest_sw));
-        Gem5::setFpRound(old_rm);
         finishVfp(fpscr, state, fpscr.fz);
         FpscrExc = fpscr;
     '''
@@ -1160,13 +1154,11 @@ let {{
         double cOp1 = dbl(FpOp1P0_uw, FpOp1P1_uw);
         vfpFlushToZero(fpscr, cOp1);
         VfpSavedState state = prepFpState(fpscr.rMode);
-        Gem5::RoundingMode old_rm = Gem5::getFpRound();
-        Gem5::setFpRound(Gem5::RoundingMode::TowardZero);
+        fesetround(FeRoundZero);
         __asm__ __volatile__("" : "=m" (cOp1) : "m" (cOp1));
         int64_t result = vfpFpToFixed<double>(
             cOp1, true, 32, 0, true, {round_mode});
         __asm__ __volatile__("" :: "m" (result));
-        Gem5::setFpRound(old_rm);
         finishVfp(fpscr, state, fpscr.fz);
         FpDestP0_uw = result;
         FpscrExc = fpscr;