ARM: For non-cachable accesses set the UNCACHABLE flag
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@@ -360,6 +360,7 @@ TLB::translateFs(RequestPtr req, ThreadContext *tc, Mode mode,
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// a bit of a hack but this effectively clrears this processors monitor
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if (flags & Clrex){
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req->setPaddr(0);
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req->setFlags(Request::UNCACHEABLE);
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return NoFault;
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}
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if (!is_fetch) {
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@@ -430,7 +431,8 @@ TLB::translateFs(RequestPtr req, ThreadContext *tc, Mode mode,
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outerAttrs: %d\n",
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te->shareable, te->innerAttrs, te->outerAttrs);
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setAttr(te->attributes);
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if (te->nonCacheable)
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req->setFlags(Request::UNCACHEABLE);
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uint32_t dacr = tc->readMiscReg(MISCREG_DACR);
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switch ( (dacr >> (te->domain * 2)) & 0x3) {
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case 0:
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