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ARM: Implement DSB, DMB, ISB

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This commit is contained in:
Gene Wu
2010-08-23 11:18:41 -05:00
parent aabf478920
commit 7405f4b774
3 changed files with 33 additions and 6 deletions
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6
src/arch/arm/isa/formats/branch.isa
View File

@@ -196,11 +196,11 @@ def format Thumb32BranchesAndMiscCtrl() {{
case 0x2:
return new Clrex(machInst);
case 0x4:
return new WarnUnimplemented("dsb", machInst);
return new Dsb(machInst);
case 0x5:
return new WarnUnimplemented("dmb", machInst);
return new Dmb(machInst);
case 0x6:
return new WarnUnimplemented("isb", machInst);
return new Isb(machInst);
default:
break;
}

6
src/arch/arm/isa/formats/uncond.isa
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@@ -99,11 +99,11 @@ def format ArmUnconditional() {{
case 0x1:
return new Clrex(machInst);
case 0x4:
return new WarnUnimplemented("dsb", machInst);
return new Dsb(machInst);
case 0x5:
return new WarnUnimplemented("dmb", machInst);
return new Dmb(machInst);
case 0x6:
return new WarnUnimplemented("isb", machInst);
return new Isb(machInst);
}
}
} else if (bits(op2, 0) == 0) {

27
src/arch/arm/isa/insts/misc.isa
View File

@@ -679,6 +679,33 @@ let {{
decoder_output += BasicConstructor.subst(clrexIop)
exec_output += PredOpExecute.subst(clrexIop)
isbCode = '''
'''
isbIop = InstObjParams("isb", "Isb", "PredOp",
{"code": isbCode,
"predicate_test": predicateTest}, ['IsSerializing'])
header_output += BasicDeclare.subst(isbIop)
decoder_output += BasicConstructor.subst(isbIop)
exec_output += PredOpExecute.subst(isbIop)
dsbCode = '''
'''
dsbIop = InstObjParams("dsb", "Dsb", "PredOp",
{"code": dsbCode,
"predicate_test": predicateTest},['IsMemBarrier'])
header_output += BasicDeclare.subst(dsbIop)
decoder_output += BasicConstructor.subst(dsbIop)
exec_output += PredOpExecute.subst(dsbIop)
dmbCode = '''
'''
dmbIop = InstObjParams("dmb", "Dmb", "PredOp",
{"code": dmbCode,
"predicate_test": predicateTest},['IsMemBarrier'])
header_output += BasicDeclare.subst(dmbIop)
decoder_output += BasicConstructor.subst(dmbIop)
exec_output += PredOpExecute.subst(dmbIop)
cpsCode = '''
uint32_t mode = bits(imm, 4, 0);
uint32_t f = bits(imm, 5);