arch-riscv: Fix the vector store indexed instructions declaration

Change-Id: I6f8701ef0819c22eda8cb20d09c40101f2d001a0
2023-12-12 16:35:01 +08:00
parent 9aab380775
commit a9f8db7044
1 changed files with 1 additions and 1 deletions
--- a/src/arch/riscv/isa/templates/vector_mem.isa
+++ b/src/arch/riscv/isa/templates/vector_mem.isa
@@ -1586,7 +1586,7 @@ Fault
    }
    if (machInst.vill)
        return std::make_shared<IllegalInstFault>("VILL is set", machInst);
-    %(op_src_decl)s;
+    %(op_decl)s;
    %(op_rd)s;
    %(set_vlenb)s;
    %(ea_code)s;