From a9f8db704483bffe9db96364d0871eed8e81a10c Mon Sep 17 00:00:00 2001
From: Roger Chang <rogerycchang@google.com>
Date: Tue, 12 Dec 2023 16:35:01 +0800
Subject: [PATCH] arch-riscv: Fix the vector store indexed instructions
 declaration

Change-Id: I6f8701ef0819c22eda8cb20d09c40101f2d001a0
---
 src/arch/riscv/isa/templates/vector_mem.isa | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/arch/riscv/isa/templates/vector_mem.isa b/src/arch/riscv/isa/templates/vector_mem.isa
index c405304a4f..1510c106c7 100644
--- a/src/arch/riscv/isa/templates/vector_mem.isa
+++ b/src/arch/riscv/isa/templates/vector_mem.isa
@@ -1586,7 +1586,7 @@ Fault
     }
     if (machInst.vill)
         return std::make_shared<IllegalInstFault>("VILL is set", machInst);
-    %(op_src_decl)s;
+    %(op_decl)s;
     %(op_rd)s;
     %(set_vlenb)s;
     %(ea_code)s;