arch-x86: Fixed locked cmpxchg8b allows reordering

Locked versions of cmpxcgh8b (and cmpxcgh16b) should
be guarded by mfences to prevent reordering from
surrounding memory instructions.

Change-Id: I4a04bb871b4f9a38efd78df194b43f785d5d2236
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44166
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/arch/x86/isa/insts/general_purpose/semaphores.py

@@ -132,6 +132,7 @@ cmpxchg8bCode = '''
 def macroop CMPXCHG8B_%(suffix)s {
     .adjust_env clampOsz
     %(rdip)s
+    %(mfence)s
     lea t1, seg, %(sib)s, disp, dataSize=asz
     ldsplit%(l)s (t2, t3), seg, [1, t0, t1], disp=0
 
@@ -150,20 +151,25 @@ doneComparing:
 
     # Write to memory
     stsplit%(ul)s (t2, t3), seg, [1, t0, t1], disp=0
+    %(mfence)s
 };
 '''
 
 microcode += cmpxchg8bCode % {"rdip": "", "sib": "sib",
                               "l": "", "ul": "",
+                              "mfence": "",
                               "suffix": "M"}
 microcode += cmpxchg8bCode % {"rdip": "rdip t7", "sib": "riprel",
                               "l": "", "ul": "",
+                              "mfence": "",
                               "suffix": "P"}
 microcode += cmpxchg8bCode % {"rdip": "", "sib": "sib",
                               "l": "l", "ul": "ul",
+                              "mfence": "mfence",
                               "suffix": "LOCKED_M"}
 microcode += cmpxchg8bCode % {"rdip": "rdip t7", "sib": "riprel",
                               "l": "l", "ul": "ul",
+                              "mfence": "mfence",
                               "suffix": "LOCKED_P"}
 
 #let {{