cpu: Disable CPU switching functionality with TraceCPU
Now that the TraceCPU is no longer a BaseCPU we disable CPU switching functionality. AFAICS from the code, it seems like using m5.switchCpus was never really working. The takeOverFrom was described as being used when checkpointing (which is not really the case). Moreover the icache/dcache event loops were not checking if the CPU was switched out so the trace was always been consumed regardless of the BaseCPU state. Note: IMHO the only case where you might want to switch between an execution-driven CPU to the TraceCPU is when you want to warm your caches before the ROI. All other cases don't really make sense as with the TraceCPU there is no architectural state being maintained/updated. Change-Id: I0611359d2b833e1bc0762be72642df24a7c92b1e Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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@@ -55,10 +55,6 @@ class TraceCPU(ClockedObject):
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def require_caches(cls):
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return True
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@classmethod
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def support_take_over(cls):
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return True
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system = Param.System(Parent.any, "system object")
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icache_port = RequestPort("Instruction Port")
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@@ -39,6 +39,7 @@
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#include "base/compiler.hh"
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#include "sim/sim_exit.hh"
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#include "sim/system.hh"
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namespace gem5
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{
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@@ -94,14 +95,6 @@ TraceCPU::updateNumOps(uint64_t rob_num)
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}
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}
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void
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TraceCPU::takeOverFrom(BaseCPU *oldCPU)
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{
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// Unbind the ports of the old CPU and bind the ports of the TraceCPU.
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getInstPort().takeOverFrom(&oldCPU->getInstPort());
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getDataPort().takeOverFrom(&oldCPU->getDataPort());
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}
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void
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TraceCPU::init()
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{
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@@ -45,10 +45,10 @@
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#include <unordered_map>
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#include "base/statistics.hh"
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#include "cpu/base.hh"
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#include "debug/TraceCPUData.hh"
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#include "debug/TraceCPUInst.hh"
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#include "mem/packet.hh"
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#include "mem/port.hh"
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#include "mem/request.hh"
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#include "params/TraceCPU.hh"
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#include "proto/inst_dep_record.pb.h"
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@@ -163,14 +163,6 @@ class TraceCPU : public ClockedObject
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*/
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void updateNumOps(uint64_t rob_num);
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/*
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* When resuming from checkpoint in FS mode, the TraceCPU takes over from
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* the old cpu. This function overrides the takeOverFrom() function in the
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* BaseCPU. It unbinds the ports of the old CPU and binds the ports of the
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* TraceCPU.
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*/
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void takeOverFrom(BaseCPU *oldCPU);
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/**
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* When instruction cache port receives a retry, schedule event
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* icacheNextEvent.
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