arch-arm: Properly compute EL even in stage2 walks
This is done in order to differentiate between EL0 (unprivileged) and EL1. Effectively it won't change much as most of the decisions are now taken according to the translation regime which will be the same regardless (EL10) Change-Id: I218037e9c19cf638aff05c51869e439204d9af69 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Richard Cooper <richard.cooper@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
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@@ -332,18 +332,15 @@ TableWalker::walk(const RequestPtr &_req, ThreadContext *_tc, uint16_t _asid,
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currState->startTime = curTick();
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currState->tc = _tc;
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// ARM DDI 0487A.f (ARMv8 ARM) pg J8-5672
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// aarch32/translation/translation/AArch32.TranslateAddress dictates
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// even AArch32 EL0 will use AArch64 translation if EL1 is in AArch64.
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currState->el =
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MMU::tranTypeEL(_tc->readMiscReg(MISCREG_CPSR),
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_tc->readMiscReg(MISCREG_SCR_EL3),
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tranType);
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if (isStage2) {
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currState->el = EL1;
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currState->regime = TranslationRegime::EL10;
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currState->aarch64 = ELIs64(_tc, EL2);
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} else {
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currState->el =
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MMU::tranTypeEL(_tc->readMiscReg(MISCREG_CPSR),
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_tc->readMiscReg(MISCREG_SCR_EL3),
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tranType);
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currState->regime =
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translationRegime(_tc, currState->el);
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currState->aarch64 =
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