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arm: Stop serializing ISA values wihch are cached from the system.

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These values are not really part of the ISA state and could be
retrieved from the system during execution. Also these values are
already being set in the ISA constructor.

Change-Id: Iea5f9bbb27add4ecebc6391da6c1c1e49e76508f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22543
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Gabe Black
2019-11-04 15:48:52 -08:00
parent 8e8214da55
commit 97a6a64f28
1 changed files with 5 additions and 24 deletions
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29
src/arch/arm/isa.hh
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@@ -693,39 +693,20 @@ namespace ArmISA
static void zeroSveVecRegUpperPart(VecRegContainer &vc,
unsigned eCount);
void serialize(CheckpointOut &cp) const
void
serialize(CheckpointOut &cp) const
{
DPRINTF(Checkpoint, "Serializing Arm Misc Registers\n");
SERIALIZE_ARRAY(miscRegs, NUM_PHYS_MISCREGS);
SERIALIZE_SCALAR(highestELIs64);
SERIALIZE_SCALAR(haveSecurity);
SERIALIZE_SCALAR(haveLPAE);
SERIALIZE_SCALAR(haveVirtualization);
SERIALIZE_SCALAR(haveLargeAsid64);
SERIALIZE_SCALAR(physAddrRange);
SERIALIZE_SCALAR(haveSVE);
SERIALIZE_SCALAR(sveVL);
SERIALIZE_SCALAR(haveLSE);
SERIALIZE_SCALAR(havePAN);
}
void unserialize(CheckpointIn &cp)
void
unserialize(CheckpointIn &cp)
{
DPRINTF(Checkpoint, "Unserializing Arm Misc Registers\n");
UNSERIALIZE_ARRAY(miscRegs, NUM_PHYS_MISCREGS);
CPSR tmp_cpsr = miscRegs[MISCREG_CPSR];
updateRegMap(tmp_cpsr);
UNSERIALIZE_SCALAR(highestELIs64);
UNSERIALIZE_SCALAR(haveSecurity);
UNSERIALIZE_SCALAR(haveLPAE);
UNSERIALIZE_SCALAR(haveVirtualization);
UNSERIALIZE_SCALAR(haveLargeAsid64);
UNSERIALIZE_SCALAR(physAddrRange);
UNSERIALIZE_SCALAR(haveSVE);
UNSERIALIZE_SCALAR(sveVL);
UNSERIALIZE_SCALAR(haveLSE);
UNSERIALIZE_SCALAR(havePAN);
}
void startup(ThreadContext *tc);