stdlib: Fix component incorporation ordering

Running with KVM cores was not possible with the previous ordering. The
processor must be incorporated after the cache hierarchy when using a
KVM core. A more detailed account of this bug is noted here:
https://gem5.atlassian.net/browse/GEM5-1113

This patch only partially fixes the problem. Ideally the component
incorporation order should not cause problems.

Change-Id: I4bb69ffe7963ba3708458cff7f2b09e9e75830a7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52843
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Bobby R. Bruce
2021-11-14 21:22:06 -08:00
parent de7337a32a
commit 97565ecf6c

View File

@@ -234,17 +234,24 @@ class AbstractBoard(System):
The order of this board is always:
1. Connect the memory.
2. Connect the processor.
3. Connect the cache hierarchy.
2. Connect the cache hierarchy.
3. Connect the processor.
Developers may build upon this assumption when creating components.
Notes
-----
* The processor is incorporated after the cache hierarchy due to a bug
noted here: https://gem5.atlassian.net/browse/GEM5-1113. Until this
bug is fixed, this ordering must be maintained.
"""
# Incorporate the memory into the motherboard.
self.get_memory().incorporate_memory(self)
# Incorporate the processor into the motherboard.
self.get_processor().incorporate_processor(self)
# Incorporate the cache hierarchy for the motherboard.
self.get_cache_hierarchy().incorporate_cache(self)
# Incorporate the processor into the motherboard.
self.get_processor().incorporate_processor(self)