cpu: Explicitly define cache_line_size -> 64-bit unsigned int

While it makes sense to define the cache_line_size as a 32-bit unsigned int,
the use of cache_line_size is way out of its original scope.

cache_line_size has been used to produce an address mask, which masking out
the offset bits from an address. For example, [1], [2], [3], and [4].
However, since the cache_line_size is an "unsigned int", the type of the
value is not guaranteed to be 64-bit long. Subsequently, the
bit twiddling hacks in [1], [2], [3], and [4] produce 32-bit mask,
i.e., 0x00000000FFFFFFC0.

This behavior at least caused a problem in LLSC in RISC-V [5], where the
load reservation (LR) relies on the mask to produce the cache block address.
Two distinct 64-bit addresses can be mapped to the same cache block using
the above mask.

This patch explicitly defines cache_line_size as a 64-bit unsigned int so
the cache block mask can be produced correctly for 64-bit addresses.

[1] 3bdcfd6f7a/src/cpu/simple/atomic.hh (L147)
[2] 3bdcfd6f7a/src/cpu/simple/timing.hh (L224)
[3] 3bdcfd6f7a/src/cpu/o3/lsq_unit.cc (L241)
[4] 3bdcfd6f7a/src/cpu/minor/lsq.cc (L1425)
[5] 3bdcfd6f7a/src/arch/riscv/isa.cc (L787)

Change-Id: I29abc7aaab266a37326846bbf7a82219071c4ffe
Signed-off-by: Hoa Nguyen <hn@hnpl.org>
This commit is contained in:
Hoa Nguyen
2023-09-19 12:54:18 -07:00
parent 3bdcfd6f7a
commit 9057eeabec

View File

@@ -143,7 +143,7 @@ class BaseCPU : public ClockedObject
bool _switchedOut;
/** Cache the cache line size that we get from the system */
const unsigned int _cacheLineSize;
const uint64_t _cacheLineSize;
/** Global CPU statistics that are merged into the Root object. */
struct GlobalStats : public statistics::Group
@@ -394,7 +394,7 @@ class BaseCPU : public ClockedObject
/**
* Get the cache line size of the system.
*/
inline unsigned int cacheLineSize() const { return _cacheLineSize; }
inline uint64_t cacheLineSize() const { return _cacheLineSize; }
/**
* Serialize this object to the given output stream.