derek/gem5
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

dev-arm: Fix GICv3 GICD_ITARGETSR address range

Browse Source 
According to the GICv3 manual, GICD_ITARGETSR address range goes from
0x0800 to 0x0c00 (as already implemented in the GICv2 model [1])

[1]: https://github.com/gem5/gem5/blob/v22.0.0.0/\
    src/dev/arm/gic_v2.cc#L64

Change-Id: I064e91d070d1a7b79f41a06ffd2197e4c07dae32
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64074
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Giacomo Travaglini
2022-10-03 09:48:34 +01:00
parent 336e732d54
commit 7c0ab07ee2
1 changed files with 1 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/dev/arm/gic_v3_distributor.cc
View File

@@ -60,7 +60,7 @@ const AddrRange Gicv3Distributor::GICD_ICPENDR (0x0280, 0x0300);
const AddrRange Gicv3Distributor::GICD_ISACTIVER (0x0300, 0x0380);
const AddrRange Gicv3Distributor::GICD_ICACTIVER (0x0380, 0x0400);
const AddrRange Gicv3Distributor::GICD_IPRIORITYR(0x0400, 0x0800);
const AddrRange Gicv3Distributor::GICD_ITARGETSR (0x0800, 0x0900);
const AddrRange Gicv3Distributor::GICD_ITARGETSR (0x0800, 0x0c00);
const AddrRange Gicv3Distributor::GICD_ICFGR (0x0c00, 0x0d00);
const AddrRange Gicv3Distributor::GICD_IGRPMODR (0x0d00, 0x0d80);
const AddrRange Gicv3Distributor::GICD_NSACR (0x0e00, 0x0f00);