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cpu-o3: Fix minor style issue in rename_map.hh.

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Change-Id: I670e504320b41e38666dab6eb7a83e4a39bc3b00
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49146
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Gabe Black
2021-08-09 17:06:28 -07:00
parent 7ffa9f8597
commit 6903547957
1 changed files with 7 additions and 6 deletions
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13
src/cpu/o3/rename_map.hh
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@@ -223,7 +223,8 @@ class UnifiedRenameMap
* @return A RenameInfo pair indicating both the new and previous
* physical registers.
*/
RenameInfo rename(const RegId& arch_reg)
RenameInfo
rename(const RegId& arch_reg)
{
switch (arch_reg.classValue()) {
case IntRegClass:
@@ -242,11 +243,11 @@ class UnifiedRenameMap
return ccMap.rename(arch_reg);
case MiscRegClass:
{
// misc regs aren't really renamed, just remapped
PhysRegIdPtr phys_reg = lookup(arch_reg);
// Set the new register to the previous one to keep the same
// mapping throughout the execution.
return RenameInfo(phys_reg, phys_reg);
// misc regs aren't really renamed, just remapped
PhysRegIdPtr phys_reg = lookup(arch_reg);
// Set the new register to the previous one to keep the same
// mapping throughout the execution.
return RenameInfo(phys_reg, phys_reg);
}
default: