arch-arm: Add aarch64 semihosting support

Add basic support for Arm Semihosting 2.0 simulation calls [1]. These
calls let the guest system call a simulator or debugger to request
OS-like support when running bare metal code.

With the exception of SYS_SYSTEM, this implementation supports all of
the Semihosting 2.0 specification in aarch64.

[1] https://developer.arm.com/docs/100863/latest/preface

Change-Id: I08c153c18a4a4fb9f95d318e2a029724935192a7
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jack Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/8147
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>

src/arch/arm/SConscript

@@ -75,6 +75,7 @@ if env['TARGET_ISA'] == 'arm':
     Source('pmu.cc')
     Source('process.cc')
     Source('remote_gdb.cc')
+    Source('semihosting.cc')
     Source('stacktrace.cc')
     Source('system.cc')
     Source('table_walker.cc')
@@ -87,11 +88,13 @@ if env['TARGET_ISA'] == 'arm':
     SimObject('ArmInterrupts.py')
     SimObject('ArmISA.py')
     SimObject('ArmNativeTrace.py')
+    SimObject('ArmSemihosting.py')
     SimObject('ArmSystem.py')
     SimObject('ArmTLB.py')
     SimObject('ArmPMU.py')
 
     DebugFlag('Arm')
+    DebugFlag('Semihosting')
     DebugFlag('Decoder', "Instructions returned by the predecoder")
     DebugFlag('Faults', "Trace Exceptions, interrupts, svc/swi")
     DebugFlag('PMUVerbose', "Performance Monitor")