mem: Remove redundant Packet::allocate calls

This patch cleans up the packet memory allocation confusion. The data
is always allocated at the requesting side, when a packet is created
(or copied), and there is never a need for any device to allocate any
space if it is merely responding to a paket. This behaviour is in line
with how SystemC and TLM works as well, thus increasing
interoperability, and matching established conventions.

The redundant calls to Packet::allocate are removed, and the checks in
the function are tightened up to make sure data is only ever allocated
once. There are still some oddities in the packet copy constructor
where we copy the data pointer if it is static (without ownership),
and allocate new space if the data is dynamic (with ownership). The
latter is being worked on further in a follow-on patch.

src/dev/alpha/backdoor.cc

@@ -111,7 +111,6 @@ AlphaBackdoor::read(PacketPtr pkt)
 
     Addr daddr = pkt->getAddr() - pioAddr;
 
-    pkt->allocate();
     pkt->makeAtomicResponse();
 
     switch (pkt->getSize())

src/dev/alpha/tsunami_cchip.cc

@@ -83,7 +83,6 @@ TsunamiCChip::read(PacketPtr pkt)
     Addr regnum = (pkt->getAddr() - pioAddr) >> 6;
     Addr daddr = (pkt->getAddr() - pioAddr);
 
-    pkt->allocate();
     switch (pkt->getSize()) {
 
       case sizeof(uint64_t):

src/dev/alpha/tsunami_io.cc

@@ -96,8 +96,6 @@ TsunamiIO::read(PacketPtr pkt)
     DPRINTF(Tsunami, "io read  va=%#x size=%d IOPorrt=%#x\n", pkt->getAddr(),
             pkt->getSize(), daddr);
 
-    pkt->allocate();
-
     if (pkt->getSize() == sizeof(uint8_t)) {
         switch(daddr) {
           // PIC1 mask read

src/dev/alpha/tsunami_pchip.cc

@@ -72,7 +72,6 @@ TsunamiPChip::read(PacketPtr pkt)
 {
     assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
 
-    pkt->allocate();
     Addr daddr = (pkt->getAddr() - pioAddr) >> 6;;
     assert(pkt->getSize() == sizeof(uint64_t));
 

src/dev/arm/a9scu.cc

@@ -55,7 +55,6 @@ A9SCU::read(PacketPtr pkt)
     assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
     assert(pkt->getSize() == 4);
     Addr daddr = pkt->getAddr() - pioAddr;
-    pkt->allocate();
 
     switch(daddr) {
       case Control:

src/dev/arm/amba_device.cc

@@ -76,8 +76,6 @@ AmbaDevice::readId(PacketPtr pkt, uint64_t amba_id, Addr pio_addr)
     if (daddr < AMBA_PER_ID0 || daddr > AMBA_CEL_ID3)
         return false;
 
-    pkt->allocate();
-
     int byte = (daddr - AMBA_PER_ID0) << 1;
     // Too noisy right now
     DPRINTF(AMBA, "Returning %#x for offset %#x(%d)\n",

src/dev/arm/amba_fake.cc

@@ -57,7 +57,6 @@ AmbaFake::read(PacketPtr pkt)
     assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
 
     Addr daddr = pkt->getAddr() - pioAddr;
-    pkt->allocate();
 
     DPRINTF(AMBA, " read register %#x\n", daddr);
 
@@ -74,7 +73,6 @@ AmbaFake::write(PacketPtr pkt)
 {
 
     Addr daddr = pkt->getAddr() - pioAddr;
-    pkt->allocate();
 
     if (!params()->ignore_access)
         panic("Tried to write AmbaFake at offset %#x that doesn't exist\n", daddr);

src/dev/arm/energy_ctrl.cc

@@ -64,7 +64,6 @@ EnergyCtrl::read(PacketPtr pkt)
 {
     assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
     assert(pkt->getSize() == 4);
-    pkt->allocate();
 
     Addr daddr = pkt->getAddr() - pioAddr;
     assert((daddr & 3) == 0);

src/dev/arm/gic_pl390.cc

@@ -150,7 +150,6 @@ Tick
 Pl390::readDistributor(PacketPtr pkt)
 {
     Addr daddr = pkt->getAddr() - distAddr;
-    pkt->allocate();
 
     int ctx_id = pkt->req->contextId();
 
@@ -284,7 +283,6 @@ Tick
 Pl390::readCpu(PacketPtr pkt)
 {
     Addr daddr = pkt->getAddr() - cpuAddr;
-    pkt->allocate();
 
     assert(pkt->req->hasContextId());
     int ctx_id = pkt->req->contextId();
@@ -369,7 +367,6 @@ Tick
 Pl390::readMsix(PacketPtr pkt)
 {
     Addr daddr = pkt->getAddr() - msixRegAddr;
-    pkt->allocate();
 
     DPRINTF(GIC, "Gic MSIX read register %#x\n", daddr);
 
@@ -390,7 +387,6 @@ Tick
 Pl390::writeDistributor(PacketPtr pkt)
 {
     Addr daddr = pkt->getAddr() - distAddr;
-    pkt->allocate();
 
     assert(pkt->req->hasContextId());
     int ctx_id = pkt->req->contextId();
@@ -531,7 +527,6 @@ Tick
 Pl390::writeCpu(PacketPtr pkt)
 {
     Addr daddr = pkt->getAddr() - cpuAddr;
-    pkt->allocate();
 
     assert(pkt->req->hasContextId());
     int ctx_id = pkt->req->contextId();
@@ -586,7 +581,6 @@ Tick
 Pl390::writeMsix(PacketPtr pkt)
 {
     Addr daddr = pkt->getAddr() - msixRegAddr;
-    pkt->allocate();
 
     DPRINTF(GIC, "Gic MSI-X write register %#x data %d\n",
                  daddr, pkt->get<uint32_t>());

src/dev/arm/hdlcd.cc

@@ -104,8 +104,6 @@ HDLcd::read(PacketPtr pkt)
             pkt->getAddr() < pioAddr + pioSize &&
             pkt->getSize() == 4);
 
-    pkt->allocate();
-
     switch (daddr) {
       case Version:
         data = version;

src/dev/arm/kmi.cc

@@ -69,8 +69,6 @@ Pl050::read(PacketPtr pkt)
     assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
 
     Addr daddr = pkt->getAddr() - pioAddr;
-    pkt->allocate();
-
 
     uint32_t data = 0;
 

src/dev/arm/pl011.cc

@@ -64,7 +64,6 @@ Pl011::read(PacketPtr pkt)
     assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
 
     Addr daddr = pkt->getAddr() - pioAddr;
-    pkt->allocate();
 
     DPRINTF(Uart, " read register %#x size=%d\n", daddr, pkt->getSize());
 

src/dev/arm/pl111.cc

@@ -104,7 +104,6 @@ Pl111::read(PacketPtr pkt)
            pkt->getAddr() < pioAddr + pioSize);
 
     Addr daddr = pkt->getAddr() - pioAddr;
-    pkt->allocate();
 
     DPRINTF(PL111, " read register %#x size=%d\n", daddr, pkt->getSize());
 

src/dev/arm/rtc_pl031.cc

@@ -62,7 +62,6 @@ PL031::read(PacketPtr pkt)
     assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
     assert(pkt->getSize() == 4);
     Addr daddr = pkt->getAddr() - pioAddr;
-    pkt->allocate();
     uint32_t data;
 
     DPRINTF(Timer, "Reading from RTC at offset: %#x\n", daddr);
@@ -125,7 +124,6 @@ PL031::write(PacketPtr pkt)
     assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
     assert(pkt->getSize() == 4);
     Addr daddr = pkt->getAddr() - pioAddr;
-    pkt->allocate();
     DPRINTF(Timer, "Writing to RTC at offset: %#x\n", daddr);
 
     switch (daddr) {

src/dev/arm/rv_ctrl.cc

@@ -54,7 +54,6 @@ RealViewCtrl::read(PacketPtr pkt)
     assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
     assert(pkt->getSize() == 4);
     Addr daddr = pkt->getAddr() - pioAddr;
-    pkt->allocate();
 
     switch(daddr) {
       case ProcId0:

src/dev/arm/timer_cpulocal.cc

@@ -75,7 +75,6 @@ CpuLocalTimer::read(PacketPtr pkt)
     assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
     assert(pkt->getSize() == 4);
     Addr daddr = pkt->getAddr() - pioAddr;
-    pkt->allocate();
     int cpu_id = pkt->req->contextId();
     DPRINTF(Timer, "Reading from CpuLocalTimer at offset: %#x\n", daddr);
     assert(cpu_id >= 0);
@@ -154,7 +153,6 @@ CpuLocalTimer::write(PacketPtr pkt)
     assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
     assert(pkt->getSize() == 4);
     Addr daddr = pkt->getAddr() - pioAddr;
-    pkt->allocate();
     int cpu_id = pkt->req->contextId();
     DPRINTF(Timer, "Writing to CpuLocalTimer at offset: %#x\n", daddr);
     assert(cpu_id >= 0);

src/dev/arm/timer_sp804.cc

@@ -66,7 +66,6 @@ Sp804::read(PacketPtr pkt)
     assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
     assert(pkt->getSize() == 4);
     Addr daddr = pkt->getAddr() - pioAddr;
-    pkt->allocate();
     DPRINTF(Timer, "Reading from DualTimer at offset: %#x\n", daddr);
 
     if (daddr < Timer::Size)
@@ -121,7 +120,6 @@ Sp804::write(PacketPtr pkt)
     assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
     assert(pkt->getSize() == 4);
     Addr daddr = pkt->getAddr() - pioAddr;
-    pkt->allocate();
     DPRINTF(Timer, "Writing to DualTimer at offset: %#x\n", daddr);
 
     if (daddr < Timer::Size)

src/dev/arm/vgic.cc

@@ -92,7 +92,6 @@ Tick
 VGic::readVCpu(PacketPtr pkt)
 {
     Addr daddr = pkt->getAddr() - vcpuAddr;
-    pkt->allocate();
 
     int ctx_id = pkt->req->contextId();
     assert(ctx_id < VGIC_CPU_MAX);
@@ -137,7 +136,6 @@ Tick
 VGic::readCtrl(PacketPtr pkt)
 {
     Addr daddr = pkt->getAddr() - hvAddr;
-    pkt->allocate();
 
     int ctx_id = pkt->req->contextId();
 
@@ -232,7 +230,6 @@ Tick
 VGic::writeVCpu(PacketPtr pkt)
 {
     Addr daddr = pkt->getAddr() - vcpuAddr;
-    pkt->allocate();
 
     int ctx_id = pkt->req->contextId();
     assert(ctx_id < VGIC_CPU_MAX);
@@ -280,7 +277,6 @@ Tick
 VGic::writeCtrl(PacketPtr pkt)
 {
     Addr daddr = pkt->getAddr() - hvAddr;
-    pkt->allocate();
 
     int ctx_id = pkt->req->contextId();
 

src/dev/copy_engine.cc

@@ -182,8 +182,6 @@ CopyEngine::read(PacketPtr pkt)
 
     DPRINTF(DMACopyEngine, "Read device register %#X size: %d\n", daddr, size);
 
-    pkt->allocate();
-
     ///
     /// Handle read of register here
     ///

src/dev/i8254xGBe.cc

@@ -183,8 +183,6 @@ IGbE::read(PacketPtr pkt)
 
     DPRINTF(Ethernet, "Read device register %#X\n", daddr);
 
-    pkt->allocate();
-
     //
     // Handle read of register here
     //

src/dev/ide_ctrl.cc

@@ -172,8 +172,6 @@ IdeController::readConfig(PacketPtr pkt)
         return PciDevice::readConfig(pkt);
     }
 
-    pkt->allocate();
-
     switch (pkt->getSize()) {
       case sizeof(uint8_t):
         switch (offset) {
@@ -462,7 +460,6 @@ IdeController::Channel::accessBMI(Addr offset,
 void
 IdeController::dispatchAccess(PacketPtr pkt, bool read)
 {
-    pkt->allocate();
     if (pkt->getSize() != 1 && pkt->getSize() != 2 && pkt->getSize() !=4)
          panic("Bad IDE read size: %d\n", pkt->getSize());
 

src/dev/isa_fake.cc

@@ -53,7 +53,6 @@ IsaFake::IsaFake(Params *p)
 Tick
 IsaFake::read(PacketPtr pkt)
 {
-    pkt->allocate();
     pkt->makeAtomicResponse();
 
     if (params()->warn_access != "")

src/dev/mips/malta_cchip.cc

@@ -78,7 +78,6 @@ MaltaCChip::read(PacketPtr pkt)
     Addr regnum = (pkt->getAddr() - pioAddr) >> 6;
     Addr daddr = (pkt->getAddr() - pioAddr);
 
-    pkt->allocate();
     switch (pkt->getSize()) {
 
       case sizeof(uint64_t):

src/dev/mips/malta_pchip.cc

@@ -71,7 +71,6 @@ MaltaPChip::read(PacketPtr pkt)
 {
     assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
 
-    pkt->allocate();
     Addr daddr = (pkt->getAddr() - pioAddr) >> 6;;
     assert(pkt->getSize() == sizeof(uint64_t));
 

src/dev/ns_gige.cc

@@ -186,8 +186,6 @@ NSGigE::read(PacketPtr pkt)
 {
     assert(ioEnable);
 
-    pkt->allocate();
-
     //The mask is to give you only the offset into the device register file
     Addr daddr = pkt->getAddr() & 0xfff;
     DPRINTF(EthernetPIO, "read  da=%#x pa=%#x size=%d\n",

src/dev/pciconfigall.cc

@@ -55,9 +55,6 @@ PciConfigAll::PciConfigAll(const Params *p)
 Tick
 PciConfigAll::read(PacketPtr pkt)
 {
-
-    pkt->allocate();
-
     DPRINTF(PciConfigAll, "read  va=%#x size=%d\n", pkt->getAddr(),
             pkt->getSize());
 

src/dev/pcidev.cc

@@ -294,10 +294,6 @@ PciDevice::readConfig(PacketPtr pkt)
         panic("Out-of-range access to PCI config space!\n");
     }
 
-
-
-    pkt->allocate();
-
     switch (pkt->getSize()) {
       case sizeof(uint8_t):
         pkt->set<uint8_t>(config.data[offset]);

src/dev/sinic.cc

@@ -225,8 +225,6 @@ Device::read(PacketPtr pkt)
     Addr index = daddr >> Regs::VirtualShift;
     Addr raddr = daddr & Regs::VirtualMask;
 
-    pkt->allocate();
-
     if (!regValid(raddr))
         panic("invalid register: cpu=%d vnic=%d da=%#x pa=%#x size=%d",
               cpu, index, daddr, pkt->getAddr(), pkt->getSize());

src/dev/sparc/dtod.cc

@@ -65,7 +65,6 @@ DumbTOD::read(PacketPtr pkt)
     assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
     assert(pkt->getSize() == 8);
 
-    pkt->allocate();
     pkt->set(todTime);
     todTime += 1000;
 

src/dev/uart8250.cc

@@ -113,7 +113,6 @@ Uart8250::read(PacketPtr pkt)
     assert(pkt->getSize() == 1);
 
     Addr daddr = pkt->getAddr() - pioAddr;
-    pkt->allocate();
 
     DPRINTF(Uart, " read register %#x\n", daddr);
 

src/dev/virtio/base.cc

@@ -422,7 +422,6 @@ void
 VirtIODeviceBase::readConfigBlob(PacketPtr pkt, Addr cfgOffset, const uint8_t *cfg)
 {
     const unsigned size(pkt->getSize());
-    pkt->allocate();
 
     if (cfgOffset + size > configSize)
         panic("Config read out of bounds.\n");
@@ -434,7 +433,6 @@ void
 VirtIODeviceBase::writeConfigBlob(PacketPtr pkt, Addr cfgOffset, uint8_t *cfg)
 {
     const unsigned size(pkt->getSize());
-    pkt->allocate();
 
     if (cfgOffset + size > configSize)
         panic("Config write out of bounds.\n");

src/dev/virtio/pci.cc

@@ -75,8 +75,6 @@ PciVirtIO::read(PacketPtr pkt)
         return 0;
     }
 
-    pkt->allocate();
-
     switch(offset) {
       case OFF_DEVICE_FEATURES:
         DPRINTF(VIOPci, "   DEVICE_FEATURES request\n");
@@ -153,8 +151,6 @@ PciVirtIO::write(PacketPtr pkt)
         return 0;
     }
 
-    pkt->allocate();
-
     switch(offset) {
       case OFF_DEVICE_FEATURES:
         warn("Guest tried to write device features.");

src/mem/cache/cache_impl.hh

@@ -1566,7 +1566,6 @@ doTimingSupplyResponse(PacketPtr req_pkt, const uint8_t *blk_data,
     // already made a copy...
     PacketPtr pkt = already_copied ? req_pkt : new Packet(req_pkt);
     assert(req_pkt->isInvalidate() || pkt->sharedAsserted());
-    pkt->allocate();
     pkt->makeTimingResponse();
     // @todo Make someone pay for this
     pkt->firstWordDelay = pkt->lastWordDelay = 0;
@@ -2018,7 +2017,6 @@ Cache<TagStore>::getTimingPacket()
             // make copy of current packet to forward, keep current
             // copy for response handling
             pkt = new Packet(tgt_pkt);
-            pkt->allocate();
             if (pkt->isWrite()) {
                 pkt->setData(tgt_pkt->getConstPtr<uint8_t>());
             }

src/mem/packet.cc

@@ -204,7 +204,6 @@ Packet::checkFunctional(Printable *obj, Addr addr, bool is_secure, int size,
 
     if (isRead()) {
         if (func_start >= val_start && func_end <= val_end) {
-            allocate();
             memcpy(getPtr<uint8_t>(), data + offset, getSize());
             return true;
         } else {

src/mem/packet.hh

@@ -659,6 +659,11 @@ class Packet : public Printable
 
         flags.set(pkt->flags & (VALID_ADDR|VALID_SIZE));
         flags.set(pkt->flags & STATIC_DATA);
+
+        // if we did not copy the static data pointer, allocate data
+        // dynamically instead
+        if (!data)
+            allocate();
     }
 
     /**
@@ -942,15 +947,10 @@ class Packet : public Printable
         data = NULL;
     }
 
-    /** If there isn't data in the packet, allocate some. */
+    /** Allocate memory for the packet. */
     void
     allocate()
     {
-        if (data) {
-            assert(flags.isSet(STATIC_DATA|DYNAMIC_DATA));
-            return;
-        }
-
         assert(flags.noneSet(STATIC_DATA|DYNAMIC_DATA));
         flags.set(DYNAMIC_DATA|ARRAY_DATA);
         data = new uint8_t[getSize()];