arch-arm: Remove checkSveTrap method
This is not part of the arm arm pseudocode and prevents a proper fix of the checkSveEnabled Change-Id: I075749095316e59e395d5b84a23db4309bdd7a92 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Ciro Santilli <ciro.santilli@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/28767 Tested-by: kokoro <noreply+kokoro@google.com>
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@@ -983,26 +983,6 @@ ArmStaticInst::sveAccessTrap(ExceptionLevel el) const
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}
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}
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Fault
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ArmStaticInst::checkSveTrap(ThreadContext *tc, CPSR cpsr) const
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{
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const ExceptionLevel el = (ExceptionLevel) (uint8_t) cpsr.el;
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if (ArmSystem::haveVirtualization(tc) && el <= EL2) {
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CPTR cptrEnCheck = tc->readMiscReg(MISCREG_CPTR_EL2);
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if (cptrEnCheck.tz)
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return sveAccessTrap(EL2);
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}
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if (ArmSystem::haveSecurity(tc)) {
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CPTR cptrEnCheck = tc->readMiscReg(MISCREG_CPTR_EL3);
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if (!cptrEnCheck.ez)
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return sveAccessTrap(EL3);
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}
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return NoFault;
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}
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Fault
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ArmStaticInst::checkSveEnabled(ThreadContext *tc, CPSR cpsr, CPACR cpacr) const
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{
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@@ -1011,9 +991,20 @@ ArmStaticInst::checkSveEnabled(ThreadContext *tc, CPSR cpsr, CPACR cpacr) const
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(el == EL1 && !(cpacr.zen & 0x1)))
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return sveAccessTrap(EL1);
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return checkSveTrap(tc, cpsr);
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}
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if (ArmSystem::haveVirtualization(tc) && el <= EL2) {
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CPTR cptr_en_check = tc->readMiscReg(MISCREG_CPTR_EL2);
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if (cptr_en_check.tz)
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return sveAccessTrap(EL2);
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}
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if (ArmSystem::haveSecurity(tc)) {
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CPTR cptr_en_check = tc->readMiscReg(MISCREG_CPTR_EL3);
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if (!cptr_en_check.ez)
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return sveAccessTrap(EL3);
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}
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return NoFault;
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}
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static uint8_t
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getRestoredITBits(ThreadContext *tc, CPSR spsr)
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@@ -475,11 +475,6 @@ class ArmStaticInst : public StaticInst
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*/
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Fault sveAccessTrap(ExceptionLevel el) const;
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/**
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* Check an SVE access against CPTR_EL2 and CPTR_EL3.
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*/
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Fault checkSveTrap(ThreadContext *tc, CPSR cpsr) const;
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/**
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* Check an SVE access against CPACR_EL1, CPTR_EL2, and CPTR_EL3.
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*/
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