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misc: Rename Enums namespace as enums

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As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::Enums became ::enums.

Change-Id: I39b5fb48817ad16abbac92f6254284b37fc90c40
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45420
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Daniel R. Carvalho
2021-05-06 16:18:58 -03:00
committed by Daniel Carvalho
parent 06fb0753fe
commit 4dd099ba3d
77 changed files with 384 additions and 381 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/dev/arm/flash_device.cc
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@@ -128,7 +128,7 @@ FlashDevice::initializeFlash(uint64_t disk_size, uint32_t sector_size)
for (uint32_t count = 0; count < pagesPerDisk; count++) {
//setup lookup table + physical aspects
if (dataDistribution == Enums::stripe) {
if (dataDistribution == enums::stripe) {
locationTable[count].page = count / blocksPerDisk;
locationTable[count].block = count % blocksPerDisk;

2
src/dev/arm/flash_device.hh
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@@ -167,7 +167,7 @@ class FlashDevice : public AbstractNVM
const Tick eraseLatency;
/** Flash organization */
const Enums::DataDistribution dataDistribution;
const enums::DataDistribution dataDistribution;
const uint32_t numPlanes;
/** RequestHandler stats */

4
src/dev/arm/fvp_base_pwr_ctrl.cc
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@@ -280,7 +280,7 @@ FVPBasePwrCtrl::powerCoreOn(ThreadContext *const tc, PwrStatus *const pwrs)
npwrs->pc = 0;
}
}
tc->getCpuPtr()->powerState->set(Enums::PwrState::ON);
tc->getCpuPtr()->powerState->set(enums::PwrState::ON);
}
void
@@ -295,7 +295,7 @@ FVPBasePwrCtrl::powerCoreOff(ThreadContext *const tc, PwrStatus *const pwrs)
pwrs->pc = 0;
// Clear power-on reason
pwrs->wk = 0;
tc->getCpuPtr()->powerState->set(Enums::PwrState::OFF);
tc->getCpuPtr()->powerState->set(enums::PwrState::OFF);
}
void

10
src/dev/arm/gpu_nomali.cc
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@@ -46,10 +46,10 @@
#include "params/CustomNoMaliGpu.hh"
#include "params/NoMaliGpu.hh"
static const std::map<Enums::NoMaliGpuType, nomali_gpu_type_t> gpuTypeMap{
{ Enums::T60x, NOMALI_GPU_T60X },
{ Enums::T62x, NOMALI_GPU_T62X },
{ Enums::T760, NOMALI_GPU_T760 },
static const std::map<enums::NoMaliGpuType, nomali_gpu_type_t> gpuTypeMap{
{ enums::T60x, NOMALI_GPU_T60X },
{ enums::T62x, NOMALI_GPU_T62X },
{ enums::T760, NOMALI_GPU_T760 },
};
NoMaliGpu::NoMaliGpu(const NoMaliGpuParams &p)
@@ -72,7 +72,7 @@ NoMaliGpu::NoMaliGpu(const NoMaliGpuParams &p)
const auto it_gpu(gpuTypeMap.find(p.gpu_type));
if (it_gpu == gpuTypeMap.end()) {
fatal("Unrecognized GPU type: %s (%i)\n",
Enums::NoMaliGpuTypeStrings[p.gpu_type], p.gpu_type);
enums::NoMaliGpuTypeStrings[p.gpu_type], p.gpu_type);
}
cfg.type = it_gpu->second;

2
src/dev/arm/hdlcd.hh
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@@ -370,7 +370,7 @@ class HDLcd: public AmbaDmaDevice
std::unique_ptr<ImgWriter> imgWriter;
/** Image Format */
Enums::ImageFormat imgFormat;
enums::ImageFormat imgFormat;
/** Picture of what the current frame buffer looks like */
OutputStream *pic = nullptr;

6
src/dev/arm/pci_host.cc
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@@ -55,13 +55,13 @@ GenericArmPciHost::mapPciInterrupt(const PciBusAddr &addr, PciIntPin pin) const
addr.bus, addr.dev, addr.func);
switch (intPolicy) {
case Enums::ARM_PCI_INT_STATIC:
case enums::ARM_PCI_INT_STATIC:
return GenericPciHost::mapPciInterrupt(addr, pin);
case Enums::ARM_PCI_INT_DEV:
case enums::ARM_PCI_INT_DEV:
return intBase + (addr.dev % intCount);
case Enums::ARM_PCI_INT_PIN:
case enums::ARM_PCI_INT_PIN:
return intBase + ((static_cast<uint8_t>(pin) - 1) % intCount);
default:

2
src/dev/arm/pci_host.hh
View File

@@ -56,7 +56,7 @@ class GenericArmPciHost
PciIntPin pin) const override;
protected:
const Enums::ArmPciIntRouting intPolicy;
const enums::ArmPciIntRouting intPolicy;
const uint32_t intBase;
const uint32_t intCount;
};

2
src/dev/x86/i8259.cc
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@@ -190,7 +190,7 @@ X86ISA::I8259::write(PacketPtr pkt)
break;
case 0x2:
DPRINTF(I8259, "Received initialization command word 3.\n");
if (mode == Enums::I8259Master) {
if (mode == enums::I8259Master) {
DPRINTF(I8259, "Responders attached to "
"IRQs:%s%s%s%s%s%s%s%s\n",
bits(val, 0) ? " 0" : "",

2
src/dev/x86/i8259.hh
View File

@@ -48,7 +48,7 @@ class I8259 : public BasicPioDevice
Tick latency;
std::vector<IntSourcePin<I8259> *> output;
std::vector<IntSinkPin<I8259> *> inputs;
Enums::X86I8259CascadeMode mode;
enums::X86I8259CascadeMode mode;
I8259 *slave;
// Interrupt Request Register