arm: Use the interrupt adaptor in the PMU
Rewrite interrupt handling in the PMU model to use the new interrupt adaptor. Change-Id: I2cbb99580c46d3e21a1335b897843b7b6e41f10c Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-on: https://gem5-review.googlesource.com/12400 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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committed by
Giacomo Travaglini
parent
fbaf489e62
commit
4c9ba9cd29
@@ -42,6 +42,7 @@ from m5.SimObject import *
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from m5.params import *
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from m5.params import isNullPointer
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from m5.proxy import *
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from Gic import ArmInterruptPin
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class ProbeEvent(object):
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def __init__(self, pmu, _eventId, obj, *listOfNames):
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@@ -67,7 +68,6 @@ class SoftwareIncrement(object):
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ARCH_EVENT_CORE_CYCLES = 0x11
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class ArmPMU(SimObject):
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type = 'ArmPMU'
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cxx_class = 'ArmISA::PMU'
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cxx_header = 'arch/arm/pmu.hh'
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@@ -174,4 +174,4 @@ class ArmPMU(SimObject):
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cycleEventId = Param.Int(ARCH_EVENT_CORE_CYCLES, "Cycle event id")
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platform = Param.Platform(Parent.any, "Platform this device is part of.")
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eventCounters = Param.Int(31, "Number of supported PMU counters")
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pmuInterrupt = Param.Int(68, "PMU GIC interrupt number")
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interrupt = Param.ArmInterruptPin("PMU interrupt")
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2011-2014, 2017 ARM Limited
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* Copyright (c) 2011-2014, 2017-2018 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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@@ -50,7 +50,6 @@
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#include "debug/PMUVerbose.hh"
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#include "dev/arm/base_gic.hh"
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#include "dev/arm/generic_timer.hh"
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#include "dev/arm/realview.hh"
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#include "params/ArmPMU.hh"
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namespace ArmISA {
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@@ -68,8 +67,7 @@ PMU::PMU(const ArmPMUParams *p)
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cycleCounterEventId(p->cycleEventId),
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swIncrementEvent(nullptr),
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reg_pmcr_conf(0),
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pmuInterrupt(p->pmuInterrupt),
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platform(p->platform)
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interrupt(p->interrupt)
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{
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DPRINTF(PMUVerbose, "Initializing the PMU.\n");
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@@ -78,6 +76,9 @@ PMU::PMU(const ArmPMUParams *p)
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maximumCounterCount);
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}
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warn_if(!interrupt, "ARM PMU: No interrupt specified, interrupt " \
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"delivery disabled.\n");
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/* Setup the performance counter ID registers */
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reg_pmcr_conf.imp = 0x41; // ARM Ltd.
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reg_pmcr_conf.idcode = 0x00;
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@@ -92,6 +93,14 @@ PMU::~PMU()
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{
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}
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void
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PMU::setThreadContext(ThreadContext *tc)
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{
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DPRINTF(PMUVerbose, "Assigning PMU to ContextID %i.\n", tc->contextId());
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if (interrupt)
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interrupt->setThreadContext(tc);
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}
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void
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PMU::addSoftwareIncrementEvent(unsigned int id)
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{
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@@ -638,14 +647,13 @@ PMU::setCounterTypeRegister(CounterId id, PMEVTYPER_t val)
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void
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PMU::raiseInterrupt()
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{
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RealView *rv(dynamic_cast<RealView *>(platform));
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if (!rv || !rv->gic) {
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warn_once("ARM PMU: GIC missing, can't raise interrupt.\n");
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return;
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if (interrupt) {
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DPRINTF(PMUVerbose, "Delivering PMU interrupt.\n");
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interrupt->raise();
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} else {
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warn_once("Dropping PMU interrupt as no interrupt has "
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"been specified\n");
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}
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DPRINTF(PMUVerbose, "Delivering PMU interrupt.\n");
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rv->gic->sendInt(pmuInterrupt);
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}
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void
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2011-2014, 2017 ARM Limited
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* Copyright (c) 2011-2014, 2017-2018 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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@@ -58,6 +58,7 @@
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class ArmPMUParams;
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class Platform;
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class ThreadContext;
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class ArmInterruptPin;
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namespace ArmISA {
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@@ -112,6 +113,8 @@ class PMU : public SimObject, public ArmISA::BaseISADevice {
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void regProbeListeners() override;
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public: // ISA Device interface
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void setThreadContext(ThreadContext *tc) override;
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/**
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* Set a register within the PMU.
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*
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@@ -599,9 +602,7 @@ class PMU : public SimObject, public ArmISA::BaseISADevice {
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static const MiscReg reg_pmcr_wr_mask;
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/** Performance monitor interrupt number */
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const unsigned int pmuInterrupt;
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/** Platform this device belongs to */
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Platform *const platform;
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ArmInterruptPin *const interrupt;
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/**
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* List of event types supported by this PMU.
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