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arch-riscv: Report traps to GDB in SE mode

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This commit add code to report illegal instruction and breakpoint traps
to GDB (if connected). This merely follows what POWER does.
This commit is contained in:
Jan Vrany
2023-08-08 15:19:30 +01:00
parent 546b3eac7d
commit 3564348eec
1 changed files with 8 additions and 4 deletions
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12
src/arch/riscv/faults.cc
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@@ -205,9 +205,11 @@ UnknownInstFault::invokeSE(ThreadContext *tc, const StaticInstPtr &inst)
void
IllegalInstFault::invokeSE(ThreadContext *tc, const StaticInstPtr &inst)
{
auto *rsi = static_cast<RiscvStaticInst *>(inst.get());
panic("Illegal instruction 0x%08x at pc %s: %s", rsi->machInst,
tc->pcState(), reason.c_str());
if (! tc->getSystemPtr()->trapToGdb(GDBSignal::ILL, tc->contextId()) ) {
auto *rsi = static_cast<RiscvStaticInst *>(inst.get());
panic("Illegal instruction 0x%08x at pc %s: %s", rsi->machInst,
tc->pcState(), reason.c_str());
}
}
void
@@ -226,7 +228,9 @@ IllegalFrmFault::invokeSE(ThreadContext *tc, const StaticInstPtr &inst)
void
BreakpointFault::invokeSE(ThreadContext *tc, const StaticInstPtr &inst)
{
schedRelBreak(0);
if (! tc->getSystemPtr()->trapToGdb(GDBSignal::TRAP, tc->contextId()) ) {
schedRelBreak(0);
}
}
void