misc: BaseCPU using ArchMMU instead of ArchDTB/ArchITB

With this commit we replace every TLB pointer stored in the
cpu model with a BaseMMU pointer.

JIRA: https://gem5.atlassian.net/browse/GEM5-790

Change-Id: I4932a32f68582b25cd252b5420b54d6a40ee15b8
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34976
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/cpu/simple/BaseSimpleCPU.py

@@ -40,11 +40,12 @@ class BaseSimpleCPU(BaseCPU):
 
     def addCheckerCpu(self):
         if buildEnv['TARGET_ISA'] in ['arm']:
-            from m5.objects.ArmTLB import ArmITB, ArmDTB
+            from m5.objects.ArmTLB import ArmMMU
 
             self.checker = DummyChecker(workload = self.workload)
-            self.checker.itb = ArmITB(size = self.itb.size)
-            self.checker.dtb = ArmDTB(size = self.dtb.size)
+            self.checker.mmu = ArmMMU()
+            self.checker.mmu.itb.size = self.mmu.itb.size
+            self.checker.mmu.dtb.size = self.mmu.dtb.size
         else:
             print("ERROR: Checker only supported under ARM ISA!")
             exit(1)