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arch-x86: Fix two_byte_opcodes.isa 0x6 -> 0x0 (#666)

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This bug was introduced by https://github.com/gem5/gem5/pull/593 and
caused Issue https://github.com/gem5/gem5/issues/664.

Change-Id: Ia55de364ee8260e1fe315e37e1cffbc71ab229fb
This commit is contained in:
Bobby R. Bruce
2023-12-12 08:21:27 -08:00
parent a84cfd2f0d
commit 29b77260f3
1 changed files with 1 additions and 1 deletions
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2
src/arch/x86/isa/decoder/two_byte_opcodes.isa
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@@ -291,7 +291,7 @@
0x0: decode LEGACY_DECODEVAL {
// no prefix
0x0: decode OPCODE_OP_BOTTOM3 {
0x6: Cpl0CondInst::MOV(
0x0: Cpl0CondInst::MOV(
{{misc_reg::isValid(misc_reg::cr(MODRM_REG))}},Rd,Cd);
0x1: Cpl0CondInst::MOV({{MODRM_REG < 8}},Rd,Dd);
0x2: Cpl0CondInst::MOV(