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arch-arm: Use monWrite a shorter version

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Change-Id: I8da8a39238eb100315d3df496f55a6bf3da948c6
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
This commit is contained in:
Giacomo Travaglini
2024-01-24 12:11:33 +00:00
parent 6995a99d77
commit 27c7647fee
1 changed files with 12 additions and 12 deletions
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24
src/arch/arm/regs/misc.cc
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@@ -5348,47 +5348,47 @@ ISA::initializeMiscRegMetadata()
.faultWrite(EL1, faultHcrFgtInstEL1<&HCR::ttlb, &HFGITR::tlbivaale1>)
.writes(1).exceptUserMode();
InitReg(MISCREG_TLBI_IPAS2E1OS)
.hypWrite().monSecureWrite().monNonSecureWrite();
.monWrite().hypWrite();
InitReg(MISCREG_TLBI_IPAS2LE1OS)
.hypWrite().monSecureWrite().monNonSecureWrite();
.monWrite().hypWrite();
InitReg(MISCREG_TLBI_ALLE2OS)
.monWrite().hypWrite();
InitReg(MISCREG_TLBI_VAE2OS)
.monWrite().hypWrite();
InitReg(MISCREG_TLBI_ALLE1OS)
.hypWrite().monSecureWrite().monNonSecureWrite();
.monWrite().hypWrite();
InitReg(MISCREG_TLBI_VALE2OS)
.monWrite().hypWrite();
InitReg(MISCREG_TLBI_VMALLS12E1OS)
.hypWrite().monSecureWrite().monNonSecureWrite();
.monWrite().hypWrite();
InitReg(MISCREG_TLBI_IPAS2E1IS)
.hypWrite().monSecureWrite().monNonSecureWrite();
.monWrite().hypWrite();
InitReg(MISCREG_TLBI_IPAS2LE1IS)
.hypWrite().monSecureWrite().monNonSecureWrite();
.monWrite().hypWrite();
InitReg(MISCREG_TLBI_ALLE2IS)
.monWrite().hypWrite();
InitReg(MISCREG_TLBI_VAE2IS)
.monWrite().hypWrite();
InitReg(MISCREG_TLBI_ALLE1IS)
.hypWrite().monSecureWrite().monNonSecureWrite();
.monWrite().hypWrite();
InitReg(MISCREG_TLBI_VALE2IS)
.monWrite().hypWrite();
InitReg(MISCREG_TLBI_VMALLS12E1IS)
.hypWrite().monSecureWrite().monNonSecureWrite();
.monWrite().hypWrite();
InitReg(MISCREG_TLBI_IPAS2E1)
.hypWrite().monSecureWrite().monNonSecureWrite();
.monWrite().hypWrite();
InitReg(MISCREG_TLBI_IPAS2LE1)
.hypWrite().monSecureWrite().monNonSecureWrite();
.monWrite().hypWrite();
InitReg(MISCREG_TLBI_ALLE2)
.monWrite().hypWrite();
InitReg(MISCREG_TLBI_VAE2)
.monWrite().hypWrite();
InitReg(MISCREG_TLBI_ALLE1)
.hypWrite().monSecureWrite().monNonSecureWrite();
.monWrite().hypWrite();
InitReg(MISCREG_TLBI_VALE2)
.monWrite().hypWrite();
InitReg(MISCREG_TLBI_VMALLS12E1)
.hypWrite().monSecureWrite().monNonSecureWrite();
.monWrite().hypWrite();
InitReg(MISCREG_TLBI_ALLE3OS)
.monSecureWrite().monNonSecureWrite();
InitReg(MISCREG_TLBI_VAE3OS)