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arch-arm: Dsb instruction shouldn't flush the pipeline

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DSB Instruction shouldn't flush the pipeline, hence the IsSquashAfter
attribute will be removed for either the 32 and 64 bit version.

Change-Id: I98b2b8bc78aa28445ed1a9b5f34645f8d71616ad
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/5363
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
This commit is contained in:
Giacomo Travaglini
2017-10-23 10:54:16 +01:00
committed by Andreas Sandberg
parent ccdbc394e2
commit 1a551746a0
2 changed files with 2 additions and 4 deletions
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3
src/arch/arm/isa/insts/misc.isa
View File

@@ -1090,8 +1090,7 @@ let {{
dsbIop = InstObjParams("dsb", "Dsb", "ImmOp",
{"code": dsbCode,
"predicate_test": predicateTest},
['IsMemBarrier', 'IsSerializeAfter',
'IsSquashAfter'])
['IsMemBarrier', 'IsSerializeAfter'])
header_output += ImmOpDeclare.subst(dsbIop)
decoder_output += ImmOpConstructor.subst(dsbIop)
exec_output += PredOpExecute.subst(dsbIop)

3
src/arch/arm/isa/insts/misc64.isa
View File

@@ -146,8 +146,7 @@ let {{
exec_output += BasicExecute.subst(isbIop)
dsbIop = InstObjParams("dsb", "Dsb64", "ArmStaticInst", "",
['IsMemBarrier', 'IsSerializeAfter',
'IsSquashAfter'])
['IsMemBarrier', 'IsSerializeAfter'])
header_output += BasicDeclare.subst(dsbIop)
decoder_output += BasicConstructor64.subst(dsbIop)
exec_output += BasicExecute.subst(dsbIop)