arch: Eliminate an unused pair of constants from isa_traits.hh.

The one questionable use of CurThreadInfoImplemented (always false) and
CurThreadInfoReg (always -1) has been eliminated, making these constants
unnecessary.

Change-Id: Ibfe4f7be7ce5aaf9c5e896146e1b05b3ac752305
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32922
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Gabe Black
2020-08-19 02:11:54 -07:00
parent df8a58895b
commit 1981c3110d
6 changed files with 0 additions and 18 deletions

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@@ -95,9 +95,6 @@ namespace ArmISA
// Memory accesses cannot be unaligned
const bool HasUnalignedMemAcc = true;
const bool CurThreadInfoImplemented = false;
const int CurThreadInfoReg = -1;
enum InterruptTypes
{
INT_RST,

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@@ -138,9 +138,6 @@ const uint32_t ITOUCH_ANNOTE = 0xffffffff;
const bool HasUnalignedMemAcc = true;
const bool CurThreadInfoImplemented = false;
const int CurThreadInfoReg = -1;
} // namespace MipsISA
#endif // __ARCH_MIPS_ISA_TRAITS_HH__

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@@ -57,9 +57,6 @@ const int MachineBytes = 4;
// Memory accesses can be unaligned
const bool HasUnalignedMemAcc = true;
const bool CurThreadInfoImplemented = false;
const int CurThreadInfoReg = -1;
} // namespace PowerISA
#endif // __ARCH_POWER_ISA_TRAITS_HH__

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@@ -57,9 +57,6 @@ const Addr PageBytes = ULL(1) << PageShift;
// Memory accesses can be unaligned (at least for double-word memory accesses)
const bool HasUnalignedMemAcc = true;
const bool CurThreadInfoImplemented = false;
const int CurThreadInfoReg = -1;
}
#endif //__ARCH_RISCV_ISA_TRAITS_HH__

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@@ -47,9 +47,6 @@ StaticInstPtr decodeInst(ExtMachInst);
// Memory accesses cannot be unaligned
const bool HasUnalignedMemAcc = false;
const bool CurThreadInfoImplemented = false;
const int CurThreadInfoReg = -1;
}
#endif // __ARCH_SPARC_ISA_TRAITS_HH__

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@@ -52,9 +52,6 @@ namespace X86ISA
// Memory accesses can be unaligned
const bool HasUnalignedMemAcc = true;
const bool CurThreadInfoImplemented = false;
const int CurThreadInfoReg = -1;
}
#endif // __ARCH_X86_ISATRAITS_HH__