diff --git a/src/arch/arm/isa_traits.hh b/src/arch/arm/isa_traits.hh
index c9b6eb997f..0ce38bcc9d 100644
--- a/src/arch/arm/isa_traits.hh
+++ b/src/arch/arm/isa_traits.hh
@@ -95,9 +95,6 @@ namespace ArmISA
     // Memory accesses cannot be unaligned
     const bool HasUnalignedMemAcc = true;
 
-    const bool CurThreadInfoImplemented = false;
-    const int CurThreadInfoReg = -1;
-
     enum InterruptTypes
     {
         INT_RST,
diff --git a/src/arch/mips/isa_traits.hh b/src/arch/mips/isa_traits.hh
index 5d20f7cb6f..9b44d86492 100644
--- a/src/arch/mips/isa_traits.hh
+++ b/src/arch/mips/isa_traits.hh
@@ -138,9 +138,6 @@ const uint32_t ITOUCH_ANNOTE = 0xffffffff;
 
 const bool HasUnalignedMemAcc = true;
 
-const bool CurThreadInfoImplemented = false;
-const int CurThreadInfoReg = -1;
-
 } // namespace MipsISA
 
 #endif // __ARCH_MIPS_ISA_TRAITS_HH__
diff --git a/src/arch/power/isa_traits.hh b/src/arch/power/isa_traits.hh
index 25499ffe92..89bfa6bb5a 100644
--- a/src/arch/power/isa_traits.hh
+++ b/src/arch/power/isa_traits.hh
@@ -57,9 +57,6 @@ const int MachineBytes = 4;
 // Memory accesses can be unaligned
 const bool HasUnalignedMemAcc = true;
 
-const bool CurThreadInfoImplemented = false;
-const int CurThreadInfoReg = -1;
-
 } // namespace PowerISA
 
 #endif // __ARCH_POWER_ISA_TRAITS_HH__
diff --git a/src/arch/riscv/isa_traits.hh b/src/arch/riscv/isa_traits.hh
index 18cf485131..8ba2e0cdc0 100644
--- a/src/arch/riscv/isa_traits.hh
+++ b/src/arch/riscv/isa_traits.hh
@@ -57,9 +57,6 @@ const Addr PageBytes = ULL(1) << PageShift;
 // Memory accesses can be unaligned (at least for double-word memory accesses)
 const bool HasUnalignedMemAcc = true;
 
-const bool CurThreadInfoImplemented = false;
-const int CurThreadInfoReg = -1;
-
 }
 
 #endif //__ARCH_RISCV_ISA_TRAITS_HH__
diff --git a/src/arch/sparc/isa_traits.hh b/src/arch/sparc/isa_traits.hh
index 3cd621607f..7989107626 100644
--- a/src/arch/sparc/isa_traits.hh
+++ b/src/arch/sparc/isa_traits.hh
@@ -47,9 +47,6 @@ StaticInstPtr decodeInst(ExtMachInst);
 // Memory accesses cannot be unaligned
 const bool HasUnalignedMemAcc = false;
 
-const bool CurThreadInfoImplemented = false;
-const int CurThreadInfoReg = -1;
-
 }
 
 #endif // __ARCH_SPARC_ISA_TRAITS_HH__
diff --git a/src/arch/x86/isa_traits.hh b/src/arch/x86/isa_traits.hh
index 7f55145c37..98a2dc843d 100644
--- a/src/arch/x86/isa_traits.hh
+++ b/src/arch/x86/isa_traits.hh
@@ -52,9 +52,6 @@ namespace X86ISA
 
     // Memory accesses can be unaligned
     const bool HasUnalignedMemAcc = true;
-
-    const bool CurThreadInfoImplemented = false;
-    const int CurThreadInfoReg = -1;
 }
 
 #endif // __ARCH_X86_ISATRAITS_HH__