arm: Add methods to sync vector regs and vector reg elements.

If we've been using one and need to start using the other, this will
sync over the most up to date contents from the old one to the new one.

Change-Id: I8443928ac2d8694ee02fe8d2bf17dbf9a04e5a11
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49145
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>

src/arch/arm/utility.cc

@@ -45,6 +45,7 @@
 #include "arch/arm/page_size.hh"
 #include "arch/arm/regs/cc.hh"
 #include "arch/arm/regs/int.hh"
+#include "arch/arm/regs/vec.hh"
 #include "arch/arm/system.hh"
 #include "base/compiler.hh"
 #include "cpu/base.hh"
@@ -1327,5 +1328,32 @@ encodePhysAddrRange64(int pa_size)
     }
 }
 
+void
+syncVecRegsToElems(ThreadContext *tc)
+{
+    for (int ri = 0; ri < NumVecRegs; ri++) {
+        RegId reg_id(VecRegClass, ri);
+        const VecRegContainer &reg = tc->readVecReg(reg_id);
+        for (int ei = 0; ei < NumVecElemPerVecReg; ei++) {
+            RegId elem_id(VecElemClass, ri, ei);
+            tc->setVecElem(elem_id, reg.as<VecElem>()[ei]);
+        }
+    }
+}
+
+void
+syncVecElemsToRegs(ThreadContext *tc)
+{
+    for (int ri = 0; ri < NumVecRegs; ri++) {
+        VecRegContainer reg;
+        for (int ei = 0; ei < NumVecElemPerVecReg; ei++) {
+            RegId elem_id(VecElemClass, ri, ei);
+            reg.as<VecElem>()[ei] = tc->readVecElem(elem_id);
+        }
+        RegId reg_id(VecRegClass, ri);
+        tc->setVecReg(reg_id, reg);
+    }
+}
+
 } // namespace ArmISA
 } // namespace gem5

src/arch/arm/utility.hh

@@ -393,6 +393,9 @@ byteOrder(const ThreadContext *tc)
 
 bool isUnpriviledgeAccess(ThreadContext *tc);
 
+void syncVecRegsToElems(ThreadContext *tc);
+void syncVecElemsToRegs(ThreadContext *tc);
+
 } // namespace ArmISA
 } // namespace gem5