Lukas Steiner 0f2be6ece5 Merge branch 'fix/lpddr5_ref' into 'develop' ...

Fix LPDDR5 AllBank and Per2Bank Refresh

See merge request ems/astdm/modeling.dram/dram.sys.5!114

2025-04-24 14:07:59 +00:00

..

DDR3

Have a one cycle END_RESP delay in the standard initiator

2025-01-24 14:43:06 +01:00

DDR4

Have a one cycle END_RESP delay in the standard initiator

2025-01-24 14:43:06 +01:00

DDR5

Have a one cycle END_RESP delay in the standard initiator

2025-01-24 14:43:06 +01:00

HBM2

Updated unit tests for HBM2

2025-03-26 13:53:23 +01:00

HBM3

Merge branch 'feat/hbm3_sid' into 'develop'

2025-01-28 09:04:16 +00:00

LPDDR4

Fix LPDDR4 and LPDDR5 regression tests

2025-02-26 17:10:11 +01:00

LPDDR5

Fix LPDDR5 regression test

2025-04-08 17:42:30 +02:00

CMakeLists.txt

Remove unnecessary project() calls

2024-12-20 17:40:15 +01:00