Éder Ferreira Zulian
ae09bb105c
First steps on inplementing full support to multiple memory channels/controllers based on config
...
Changes in the Arbiter block:
- now multiple initiator sockets are possible. These intiator sockets connect to multiple memory controllers;
- added lots of comments to the code in order to make it easier to understand.
Changes in Simulaton[cpp,h]:
- added TODO messages in some points that need to be changed to provide full support to multiple memory channles/controllers based on configuration.
2015-06-12 10:52:06 +02:00
Éder Ferreira Zulian
fb08bf981a
Merge remote branch 'upstream/master'
2015-05-18 10:21:41 +02:00
Matthias Jung
f74350a750
get tinyxml as submodule and build DRAMPower with qmake
2015-05-13 15:55:07 +02:00
Éder Ferreira Zulian
6f8653e699
License header added to files.
2015-05-13 12:26:21 +02:00
Éder Ferreira Zulian
6cf6c6be95
Warnings eliminated.
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Variable surrounded by IFPOW() macro since it is only needed for power simulations.
Unused variable removed.
Warning suppressed with __attribute__((__unused__)). The variable was not
removed because of its type: sc_module_name. It may be useful.
Other changes:
cscope* added to gitignore.
2015-04-24 09:11:25 +02:00
Peter Ehses
e84a3cc99b
Merge branch 'master' of https://git.rhrk.uni-kl.de/ehses/dram.vp.system
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Conflicts:
dram/dramSys/dramSys.pro
dram/resources/configs/amconfigs/am_wideio.xml
dram/resources/configs/memconfigs/fr_fcfs.xml
dram/src/common/xmlAddressdecoder.cpp
dram/src/controller/core/configuration/ConfigurationLoader.cpp
dram/src/simulation/Simulation.cpp
dram/src/simulation/Simulation.h
dram/src/simulation/TracePlayer.h
2014-12-02 15:25:48 +01:00
Peter Ehses
905e75ca32
included errormodel which is presented in DATE paper
2014-12-02 14:44:46 +01:00
Janik Schlemminger
2aa07bbbe6
Quick and Dirty XML - Refactoring necessary
2014-09-04 23:35:54 +02:00
Matthias Jung
7abf3c9958
Refactored TlmPacketGenerator in TraceGenerator
2014-09-03 11:39:41 +02:00
Janik Schlemminger
8722808a90
made traceplayer generic, so that different kind of traceplayers are supported
2014-09-03 10:27:04 +02:00
Janik Schlemminger
fcd029c6d8
Traceplayer now tolerates new lines in the Tracefiles
2014-08-29 12:23:13 +02:00
Robert Gernhardt
b1142c4796
traceplayer can now parse data of write commands. Reorder buffer inserted
2014-08-07 12:06:04 +02:00
Robert Gernhardt
bd245a9d90
reorder buffer
2014-08-04 18:27:33 +02:00
Janik Schlemminger
c028314b02
bankgroup integration. act map stores scheduled command instead of bank now
2014-07-18 13:19:15 +02:00
Janik Schlemminger
c135d7c31b
Traceplayer has a clock now
2014-07-15 00:10:49 +02:00
robert
c554b4aba1
minor refactoring
2014-07-02 18:48:50 +02:00
robert
2b062b86ff
changed scheduler interface. Fixed bug with terminateSimulation
2014-06-20 15:49:07 +02:00
robert
c5512389da
changed project structure to qtcreator, added timed out powerdown
2014-05-07 17:22:20 +02:00
Janik Schlemminger
2c0f2c95a3
simulation bug fix -> stop after termination delta cycle
2014-04-13 02:17:05 +02:00
Janik Schlemminger
8d07af4431
simulation manager extended to 4 player, refactoring, porno progress bar
2014-04-13 01:30:38 +02:00
Janik Schlemminger
e9633c1b30
cool simulation manager
2014-04-12 20:43:10 +02:00
