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Renaming scheduler buffer to buffer counter.

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This commit is contained in:
Lukas Steiner
2020-10-26 09:05:50 +01:00
parent e26a438d06
commit ffca62be70
11 changed files with 82 additions and 82 deletions
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10
DRAMSys/library/src/controller/scheduler/BufferBankwise.cpp → DRAMSys/library/src/controller/scheduler/BufferCounterBankwise.cpp
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@@ -32,27 +32,27 @@
* Author: Lukas Steiner
*/
#include "BufferBankwise.h"
#include "BufferCounterBankwise.h"
#include "../../common/dramExtensions.h"
BufferBankwise::BufferBankwise(unsigned requestBufferSize, unsigned numberOfBanks)
BufferCounterBankwise::BufferCounterBankwise(unsigned requestBufferSize, unsigned numberOfBanks)
: requestBufferSize(requestBufferSize)
{
requestsOnBank = std::vector<unsigned>(numberOfBanks, 0);
}
bool BufferBankwise::hasBufferSpace() const
bool BufferCounterBankwise::hasBufferSpace() const
{
return (requestsOnBank[lastBankID] < requestBufferSize);
}
void BufferBankwise::storeRequest(tlm::tlm_generic_payload *payload)
void BufferCounterBankwise::storeRequest(tlm::tlm_generic_payload *payload)
{
lastBankID = DramExtension::getBank(payload).ID();
requestsOnBank[lastBankID]++;
}
void BufferBankwise::removeRequest(tlm::tlm_generic_payload *payload)
void BufferCounterBankwise::removeRequest(tlm::tlm_generic_payload *payload)
{
requestsOnBank[DramExtension::getBank(payload).ID()]--;
}

12
DRAMSys/library/src/controller/scheduler/BufferBankwise.h → DRAMSys/library/src/controller/scheduler/BufferCounterBankwise.h
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@@ -32,17 +32,17 @@
* Author: Lukas Steiner
*/
#ifndef BUFFERBANKWISE_H
#define BUFFERBANKWISE_H
#ifndef BUFFERCOUNTERBANKWISE_H
#define BUFFERCOUNTERBANKWISE_H
#include <vector>
#include "BufferIF.h"
#include "BufferCounterIF.h"
class BufferBankwise : public BufferIF
class BufferCounterBankwise : public BufferCounterIF
{
public:
BufferBankwise(unsigned requestBufferSize, unsigned numberOfBanks);
BufferCounterBankwise(unsigned requestBufferSize, unsigned numberOfBanks);
virtual bool hasBufferSpace() const override;
virtual void storeRequest(tlm::tlm_generic_payload *payload) override;
virtual void removeRequest(tlm::tlm_generic_payload *payload) override;
@@ -53,4 +53,4 @@ private:
unsigned lastBankID;
};
#endif // BUFFERBANKWISE_H
#endif // BUFFERCOUNTERBANKWISE_H

8
DRAMSys/library/src/controller/scheduler/BufferIF.h → DRAMSys/library/src/controller/scheduler/BufferCounterIF.h
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@@ -32,12 +32,12 @@
* Author: Lukas Steiner
*/
#ifndef BUFFERIF_H
#define BUFFERIF_H
#ifndef BUFFERCOUNTERIF_H
#define BUFFERCOUNTERIF_H
#include <tlm.h>
class BufferIF
class BufferCounterIF
{
public:
virtual bool hasBufferSpace() const = 0;
@@ -45,4 +45,4 @@ public:
virtual void removeRequest(tlm::tlm_generic_payload *payload) = 0;
};
#endif // BUFFERIF_H
#endif // BUFFERCOUNTERIF_H

10
DRAMSys/library/src/controller/scheduler/BufferReadWrite.cpp → DRAMSys/library/src/controller/scheduler/BufferCounterReadWrite.cpp
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@@ -32,17 +32,17 @@
* Author: Lukas Steiner
*/
#include "BufferReadWrite.h"
#include "BufferCounterReadWrite.h"
BufferReadWrite::BufferReadWrite(unsigned requestBufferSize)
BufferCounterReadWrite::BufferCounterReadWrite(unsigned requestBufferSize)
: requestBufferSize(requestBufferSize) {}
bool BufferReadWrite::hasBufferSpace() const
bool BufferCounterReadWrite::hasBufferSpace() const
{
return (numberOfReads < requestBufferSize && numberOfWrites < requestBufferSize);
}
void BufferReadWrite::storeRequest(tlm::tlm_generic_payload *payload)
void BufferCounterReadWrite::storeRequest(tlm::tlm_generic_payload *payload)
{
if (payload->is_read())
numberOfReads++;
@@ -50,7 +50,7 @@ void BufferReadWrite::storeRequest(tlm::tlm_generic_payload *payload)
numberOfWrites++;
}
void BufferReadWrite::removeRequest(tlm::tlm_generic_payload *payload)
void BufferCounterReadWrite::removeRequest(tlm::tlm_generic_payload *payload)
{
if (payload->is_read())
numberOfReads--;

12
DRAMSys/library/src/controller/scheduler/BufferReadWrite.h → DRAMSys/library/src/controller/scheduler/BufferCounterReadWrite.h
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@@ -32,15 +32,15 @@
* Author: Lukas Steiner
*/
#ifndef BUFFERREADWRITE_H
#define BUFFERREADWRITE_H
#ifndef BUFFERCOUNTERREADWRITE_H
#define BUFFERCOUNTERREADWRITE_H
#include "BufferIF.h"
#include "BufferCounterIF.h"
class BufferReadWrite : public BufferIF
class BufferCounterReadWrite : public BufferCounterIF
{
public:
BufferReadWrite(unsigned requestBufferSize);
BufferCounterReadWrite(unsigned requestBufferSize);
virtual bool hasBufferSpace() const override;
virtual void storeRequest(tlm::tlm_generic_payload *payload) override;
virtual void removeRequest(tlm::tlm_generic_payload *payload) override;
@@ -51,4 +51,4 @@ private:
unsigned numberOfWrites = 0;
};
#endif // BUFFERREADWRITE_H
#endif // BUFFERCOUNTERREADWRITE_H

30
DRAMSys/library/src/controller/scheduler/SchedulerFifo.cpp
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@@ -34,53 +34,53 @@
#include "SchedulerFifo.h"
#include "../../configuration/Configuration.h"
#include "BufferBankwise.h"
#include "BufferReadWrite.h"
#include "BufferCounterBankwise.h"
#include "BufferCounterReadWrite.h"
using namespace tlm;
SchedulerFifo::SchedulerFifo()
{
Configuration &config = Configuration::getInstance();
localBuffer = std::vector<std::deque<tlm_generic_payload *>>(config.memSpec->numberOfBanks);
buffer = std::vector<std::deque<tlm_generic_payload *>>(config.memSpec->numberOfBanks);
if (config.schedulerBuffer == Configuration::SchedulerBuffer::Bankwise)
buffer = new BufferBankwise(config.requestBufferSize, config.memSpec->numberOfBanks);
bufferCounter = new BufferCounterBankwise(config.requestBufferSize, config.memSpec->numberOfBanks);
else if (config.schedulerBuffer == Configuration::SchedulerBuffer::ReadWrite)
buffer = new BufferReadWrite(config.requestBufferSize);
bufferCounter = new BufferCounterReadWrite(config.requestBufferSize);
}
bool SchedulerFifo::hasBufferSpace() const
{
return buffer->hasBufferSpace();
return bufferCounter->hasBufferSpace();
}
void SchedulerFifo::storeRequest(tlm_generic_payload *payload)
{
localBuffer[DramExtension::getBank(payload).ID()].push_back(payload);
buffer->storeRequest(payload);
buffer[DramExtension::getBank(payload).ID()].push_back(payload);
bufferCounter->storeRequest(payload);
}
void SchedulerFifo::removeRequest(tlm_generic_payload *payload)
{
localBuffer[DramExtension::getBank(payload).ID()].pop_front();
buffer->removeRequest(payload);
buffer[DramExtension::getBank(payload).ID()].pop_front();
bufferCounter->removeRequest(payload);
}
tlm_generic_payload *SchedulerFifo::getNextRequest(BankMachine *bankMachine) const
{
unsigned bankID = bankMachine->getBank().ID();
if (!localBuffer[bankID].empty())
return localBuffer[bankID].front();
if (!buffer[bankID].empty())
return buffer[bankID].front();
else
return nullptr;
}
bool SchedulerFifo::hasFurtherRowHit(Bank bank, Row row) const
{
if (localBuffer[bank.ID()].size() >= 2)
if (buffer[bank.ID()].size() >= 2)
{
tlm_generic_payload *nextRequest = localBuffer[bank.ID()][1];
tlm_generic_payload *nextRequest = buffer[bank.ID()][1];
if (DramExtension::getRow(nextRequest) == row)
return true;
}
@@ -89,7 +89,7 @@ bool SchedulerFifo::hasFurtherRowHit(Bank bank, Row row) const
bool SchedulerFifo::hasFurtherRequest(Bank bank) const
{
if (localBuffer[bank.ID()].size() >= 2)
if (buffer[bank.ID()].size() >= 2)
return true;
else
return false;

6
DRAMSys/library/src/controller/scheduler/SchedulerFifo.h
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@@ -42,7 +42,7 @@
#include "SchedulerIF.h"
#include "../../common/dramExtensions.h"
#include "../BankMachine.h"
#include "BufferIF.h"
#include "BufferCounterIF.h"
class SchedulerFifo : public SchedulerIF
{
@@ -56,8 +56,8 @@ public:
virtual bool hasFurtherRequest(Bank) const override;
private:
std::vector<std::deque<tlm::tlm_generic_payload *>> localBuffer;
BufferIF *buffer;
std::vector<std::deque<tlm::tlm_generic_payload *>> buffer;
BufferCounterIF *bufferCounter;
};
#endif // SCHEDULERFIFO_H

32
DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.cpp
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@@ -34,42 +34,42 @@
#include "SchedulerFrFcfs.h"
#include "../../configuration/Configuration.h"
#include "BufferBankwise.h"
#include "BufferReadWrite.h"
#include "BufferCounterBankwise.h"
#include "BufferCounterReadWrite.h"
using namespace tlm;
SchedulerFrFcfs::SchedulerFrFcfs()
{
Configuration &config = Configuration::getInstance();
localBuffer = std::vector<std::list<tlm_generic_payload *>>(config.memSpec->numberOfBanks);
buffer = std::vector<std::list<tlm_generic_payload *>>(config.memSpec->numberOfBanks);
if (config.schedulerBuffer == Configuration::SchedulerBuffer::Bankwise)
buffer = new BufferBankwise(config.requestBufferSize, config.memSpec->numberOfBanks);
bufferCounter = new BufferCounterBankwise(config.requestBufferSize, config.memSpec->numberOfBanks);
else if (config.schedulerBuffer == Configuration::SchedulerBuffer::ReadWrite)
buffer = new BufferReadWrite(config.requestBufferSize);
bufferCounter = new BufferCounterReadWrite(config.requestBufferSize);
}
bool SchedulerFrFcfs::hasBufferSpace() const
{
return buffer->hasBufferSpace();
return bufferCounter->hasBufferSpace();
}
void SchedulerFrFcfs::storeRequest(tlm_generic_payload *payload)
{
localBuffer[DramExtension::getBank(payload).ID()].push_back(payload);
buffer->storeRequest(payload);
buffer[DramExtension::getBank(payload).ID()].push_back(payload);
bufferCounter->storeRequest(payload);
}
void SchedulerFrFcfs::removeRequest(tlm_generic_payload *payload)
{
buffer->removeRequest(payload);
bufferCounter->removeRequest(payload);
unsigned bankID = DramExtension::getBank(payload).ID();
for (auto it = localBuffer[bankID].begin(); it != localBuffer[bankID].end(); it++)
for (auto it = buffer[bankID].begin(); it != buffer[bankID].end(); it++)
{
if (*it == payload)
{
localBuffer[bankID].erase(it);
buffer[bankID].erase(it);
break;
}
}
@@ -78,20 +78,20 @@ void SchedulerFrFcfs::removeRequest(tlm_generic_payload *payload)
tlm_generic_payload *SchedulerFrFcfs::getNextRequest(BankMachine *bankMachine) const
{
unsigned bankID = bankMachine->getBank().ID();
if (!localBuffer[bankID].empty())
if (!buffer[bankID].empty())
{
if (bankMachine->getState() == BmState::Activated)
{
// Search for row hit
Row openRow = bankMachine->getOpenRow();
for (auto it = localBuffer[bankID].begin(); it != localBuffer[bankID].end(); it++)
for (auto it = buffer[bankID].begin(); it != buffer[bankID].end(); it++)
{
if (DramExtension::getRow(*it) == openRow)
return *it;
}
}
// No row hit found or bank precharged
return localBuffer[bankID].front();
return buffer[bankID].front();
}
return nullptr;
}
@@ -99,7 +99,7 @@ tlm_generic_payload *SchedulerFrFcfs::getNextRequest(BankMachine *bankMachine) c
bool SchedulerFrFcfs::hasFurtherRowHit(Bank bank, Row row) const
{
unsigned rowHitCounter = 0;
for (auto it = localBuffer[bank.ID()].begin(); it != localBuffer[bank.ID()].end(); it++)
for (auto it = buffer[bank.ID()].begin(); it != buffer[bank.ID()].end(); it++)
{
if (DramExtension::getRow(*it) == row)
{
@@ -113,5 +113,5 @@ bool SchedulerFrFcfs::hasFurtherRowHit(Bank bank, Row row) const
bool SchedulerFrFcfs::hasFurtherRequest(Bank bank) const
{
return (localBuffer[bank.ID()].size() >= 2);
return (buffer[bank.ID()].size() >= 2);
}

6
DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.h
View File

@@ -42,7 +42,7 @@
#include "SchedulerIF.h"
#include "../../common/dramExtensions.h"
#include "../BankMachine.h"
#include "BufferIF.h"
#include "BufferCounterIF.h"
class SchedulerFrFcfs : public SchedulerIF
{
@@ -56,8 +56,8 @@ public:
virtual bool hasFurtherRequest(Bank) const override;
private:
std::vector<std::list<tlm::tlm_generic_payload *>> localBuffer;
BufferIF *buffer;
std::vector<std::list<tlm::tlm_generic_payload *>> buffer;
BufferCounterIF *bufferCounter;
};
#endif // SCHEDULERFRFCFS_H

32
DRAMSys/library/src/controller/scheduler/SchedulerFrFcfsGrp.cpp
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@@ -34,43 +34,43 @@
#include "SchedulerFrFcfsGrp.h"
#include "../../configuration/Configuration.h"
#include "BufferBankwise.h"
#include "BufferReadWrite.h"
#include "BufferCounterBankwise.h"
#include "BufferCounterReadWrite.h"
using namespace tlm;
SchedulerFrFcfsGrp::SchedulerFrFcfsGrp()
{
Configuration &config = Configuration::getInstance();
localBuffer = std::vector<std::list<tlm_generic_payload *>>(config.memSpec->numberOfBanks);
buffer = std::vector<std::list<tlm_generic_payload *>>(config.memSpec->numberOfBanks);
if (config.schedulerBuffer == Configuration::SchedulerBuffer::Bankwise)
buffer = new BufferBankwise(config.requestBufferSize, config.memSpec->numberOfBanks);
bufferCounter = new BufferCounterBankwise(config.requestBufferSize, config.memSpec->numberOfBanks);
else if (config.schedulerBuffer == Configuration::SchedulerBuffer::ReadWrite)
buffer = new BufferReadWrite(config.requestBufferSize);
bufferCounter = new BufferCounterReadWrite(config.requestBufferSize);
}
bool SchedulerFrFcfsGrp::hasBufferSpace() const
{
return buffer->hasBufferSpace();
return bufferCounter->hasBufferSpace();
}
void SchedulerFrFcfsGrp::storeRequest(tlm_generic_payload *payload)
{
localBuffer[DramExtension::getBank(payload).ID()].push_back(payload);
buffer->storeRequest(payload);
buffer[DramExtension::getBank(payload).ID()].push_back(payload);
bufferCounter->storeRequest(payload);
}
void SchedulerFrFcfsGrp::removeRequest(tlm_generic_payload *payload)
{
buffer->removeRequest(payload);
bufferCounter->removeRequest(payload);
lastCommand = payload->get_command();
unsigned bankID = DramExtension::getBank(payload).ID();
for (auto it = localBuffer[bankID].begin(); it != localBuffer[bankID].end(); it++)
for (auto it = buffer[bankID].begin(); it != buffer[bankID].end(); it++)
{
if (*it == payload)
{
localBuffer[bankID].erase(it);
buffer[bankID].erase(it);
break;
}
}
@@ -79,14 +79,14 @@ void SchedulerFrFcfsGrp::removeRequest(tlm_generic_payload *payload)
tlm_generic_payload *SchedulerFrFcfsGrp::getNextRequest(BankMachine *bankMachine) const
{
unsigned bankID = bankMachine->getBank().ID();
if (!localBuffer[bankID].empty())
if (!buffer[bankID].empty())
{
if (bankMachine->getState() == BmState::Activated)
{
// Filter all row hits
Row openRow = bankMachine->getOpenRow();
std::list<tlm_generic_payload *> rowHits;
for (auto it = localBuffer[bankID].begin(); it != localBuffer[bankID].end(); it++)
for (auto it = buffer[bankID].begin(); it != buffer[bankID].end(); it++)
{
if (DramExtension::getRow(*it) == openRow)
rowHits.push_back(*it);
@@ -116,7 +116,7 @@ tlm_generic_payload *SchedulerFrFcfsGrp::getNextRequest(BankMachine *bankMachine
}
}
// No row hit found or bank precharged
return localBuffer[bankID].front();
return buffer[bankID].front();
}
return nullptr;
}
@@ -124,7 +124,7 @@ tlm_generic_payload *SchedulerFrFcfsGrp::getNextRequest(BankMachine *bankMachine
bool SchedulerFrFcfsGrp::hasFurtherRowHit(Bank bank, Row row) const
{
unsigned rowHitCounter = 0;
for (auto it = localBuffer[bank.ID()].begin(); it != localBuffer[bank.ID()].end(); it++)
for (auto it = buffer[bank.ID()].begin(); it != buffer[bank.ID()].end(); it++)
{
if (DramExtension::getRow(*it) == row)
{
@@ -138,7 +138,7 @@ bool SchedulerFrFcfsGrp::hasFurtherRowHit(Bank bank, Row row) const
bool SchedulerFrFcfsGrp::hasFurtherRequest(Bank bank) const
{
if (localBuffer[bank.ID()].size() >= 2)
if (buffer[bank.ID()].size() >= 2)
return true;
else
return false;

6
DRAMSys/library/src/controller/scheduler/SchedulerFrFcfsGrp.h
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@@ -42,7 +42,7 @@
#include "SchedulerIF.h"
#include "../../common/dramExtensions.h"
#include "../BankMachine.h"
#include "BufferIF.h"
#include "BufferCounterIF.h"
class SchedulerFrFcfsGrp : public SchedulerIF
{
@@ -56,9 +56,9 @@ public:
virtual bool hasFurtherRequest(Bank) const override;
private:
std::vector<std::list<tlm::tlm_generic_payload *>> localBuffer;
std::vector<std::list<tlm::tlm_generic_payload *>> buffer;
tlm::tlm_command lastCommand = tlm::TLM_READ_COMMAND;
BufferIF *buffer;
BufferCounterIF *bufferCounter;
};
#endif // SCHEDULERFRFCFSGRP_H