From ffca62be7002ca67a94befe830d02321563d791b Mon Sep 17 00:00:00 2001 From: Lukas Steiner Date: Mon, 26 Oct 2020 09:05:50 +0100 Subject: [PATCH] Renaming scheduler buffer to buffer counter. --- ...Bankwise.cpp => BufferCounterBankwise.cpp} | 10 +++--- ...fferBankwise.h => BufferCounterBankwise.h} | 12 +++---- .../{BufferIF.h => BufferCounterIF.h} | 8 ++--- ...adWrite.cpp => BufferCounterReadWrite.cpp} | 10 +++--- ...erReadWrite.h => BufferCounterReadWrite.h} | 12 +++---- .../controller/scheduler/SchedulerFifo.cpp | 30 ++++++++--------- .../src/controller/scheduler/SchedulerFifo.h | 6 ++-- .../controller/scheduler/SchedulerFrFcfs.cpp | 32 +++++++++---------- .../controller/scheduler/SchedulerFrFcfs.h | 6 ++-- .../scheduler/SchedulerFrFcfsGrp.cpp | 32 +++++++++---------- .../controller/scheduler/SchedulerFrFcfsGrp.h | 6 ++-- 11 files changed, 82 insertions(+), 82 deletions(-) rename DRAMSys/library/src/controller/scheduler/{BufferBankwise.cpp => BufferCounterBankwise.cpp} (85%) rename DRAMSys/library/src/controller/scheduler/{BufferBankwise.h => BufferCounterBankwise.h} (88%) rename DRAMSys/library/src/controller/scheduler/{BufferIF.h => BufferCounterIF.h} (94%) rename DRAMSys/library/src/controller/scheduler/{BufferReadWrite.cpp => BufferCounterReadWrite.cpp} (86%) rename DRAMSys/library/src/controller/scheduler/{BufferReadWrite.h => BufferCounterReadWrite.h} (89%) diff --git a/DRAMSys/library/src/controller/scheduler/BufferBankwise.cpp b/DRAMSys/library/src/controller/scheduler/BufferCounterBankwise.cpp similarity index 85% rename from DRAMSys/library/src/controller/scheduler/BufferBankwise.cpp rename to DRAMSys/library/src/controller/scheduler/BufferCounterBankwise.cpp index d73a3a58..43648c19 100644 --- a/DRAMSys/library/src/controller/scheduler/BufferBankwise.cpp +++ b/DRAMSys/library/src/controller/scheduler/BufferCounterBankwise.cpp @@ -32,27 +32,27 @@ * Author: Lukas Steiner */ -#include "BufferBankwise.h" +#include "BufferCounterBankwise.h" #include "../../common/dramExtensions.h" -BufferBankwise::BufferBankwise(unsigned requestBufferSize, unsigned numberOfBanks) +BufferCounterBankwise::BufferCounterBankwise(unsigned requestBufferSize, unsigned numberOfBanks) : requestBufferSize(requestBufferSize) { requestsOnBank = std::vector(numberOfBanks, 0); } -bool BufferBankwise::hasBufferSpace() const +bool BufferCounterBankwise::hasBufferSpace() const { return (requestsOnBank[lastBankID] < requestBufferSize); } -void BufferBankwise::storeRequest(tlm::tlm_generic_payload *payload) +void BufferCounterBankwise::storeRequest(tlm::tlm_generic_payload *payload) { lastBankID = DramExtension::getBank(payload).ID(); requestsOnBank[lastBankID]++; } -void BufferBankwise::removeRequest(tlm::tlm_generic_payload *payload) +void BufferCounterBankwise::removeRequest(tlm::tlm_generic_payload *payload) { requestsOnBank[DramExtension::getBank(payload).ID()]--; } diff --git a/DRAMSys/library/src/controller/scheduler/BufferBankwise.h b/DRAMSys/library/src/controller/scheduler/BufferCounterBankwise.h similarity index 88% rename from DRAMSys/library/src/controller/scheduler/BufferBankwise.h rename to DRAMSys/library/src/controller/scheduler/BufferCounterBankwise.h index 3fd63490..4c351fee 100644 --- a/DRAMSys/library/src/controller/scheduler/BufferBankwise.h +++ b/DRAMSys/library/src/controller/scheduler/BufferCounterBankwise.h @@ -32,17 +32,17 @@ * Author: Lukas Steiner */ -#ifndef BUFFERBANKWISE_H -#define BUFFERBANKWISE_H +#ifndef BUFFERCOUNTERBANKWISE_H +#define BUFFERCOUNTERBANKWISE_H #include -#include "BufferIF.h" +#include "BufferCounterIF.h" -class BufferBankwise : public BufferIF +class BufferCounterBankwise : public BufferCounterIF { public: - BufferBankwise(unsigned requestBufferSize, unsigned numberOfBanks); + BufferCounterBankwise(unsigned requestBufferSize, unsigned numberOfBanks); virtual bool hasBufferSpace() const override; virtual void storeRequest(tlm::tlm_generic_payload *payload) override; virtual void removeRequest(tlm::tlm_generic_payload *payload) override; @@ -53,4 +53,4 @@ private: unsigned lastBankID; }; -#endif // BUFFERBANKWISE_H +#endif // BUFFERCOUNTERBANKWISE_H diff --git a/DRAMSys/library/src/controller/scheduler/BufferIF.h b/DRAMSys/library/src/controller/scheduler/BufferCounterIF.h similarity index 94% rename from DRAMSys/library/src/controller/scheduler/BufferIF.h rename to DRAMSys/library/src/controller/scheduler/BufferCounterIF.h index 6c8349ae..2e76bed2 100644 --- a/DRAMSys/library/src/controller/scheduler/BufferIF.h +++ b/DRAMSys/library/src/controller/scheduler/BufferCounterIF.h @@ -32,12 +32,12 @@ * Author: Lukas Steiner */ -#ifndef BUFFERIF_H -#define BUFFERIF_H +#ifndef BUFFERCOUNTERIF_H +#define BUFFERCOUNTERIF_H #include -class BufferIF +class BufferCounterIF { public: virtual bool hasBufferSpace() const = 0; @@ -45,4 +45,4 @@ public: virtual void removeRequest(tlm::tlm_generic_payload *payload) = 0; }; -#endif // BUFFERIF_H +#endif // BUFFERCOUNTERIF_H diff --git a/DRAMSys/library/src/controller/scheduler/BufferReadWrite.cpp b/DRAMSys/library/src/controller/scheduler/BufferCounterReadWrite.cpp similarity index 86% rename from DRAMSys/library/src/controller/scheduler/BufferReadWrite.cpp rename to DRAMSys/library/src/controller/scheduler/BufferCounterReadWrite.cpp index 62fdf772..efdf89db 100644 --- a/DRAMSys/library/src/controller/scheduler/BufferReadWrite.cpp +++ b/DRAMSys/library/src/controller/scheduler/BufferCounterReadWrite.cpp @@ -32,17 +32,17 @@ * Author: Lukas Steiner */ -#include "BufferReadWrite.h" +#include "BufferCounterReadWrite.h" -BufferReadWrite::BufferReadWrite(unsigned requestBufferSize) +BufferCounterReadWrite::BufferCounterReadWrite(unsigned requestBufferSize) : requestBufferSize(requestBufferSize) {} -bool BufferReadWrite::hasBufferSpace() const +bool BufferCounterReadWrite::hasBufferSpace() const { return (numberOfReads < requestBufferSize && numberOfWrites < requestBufferSize); } -void BufferReadWrite::storeRequest(tlm::tlm_generic_payload *payload) +void BufferCounterReadWrite::storeRequest(tlm::tlm_generic_payload *payload) { if (payload->is_read()) numberOfReads++; @@ -50,7 +50,7 @@ void BufferReadWrite::storeRequest(tlm::tlm_generic_payload *payload) numberOfWrites++; } -void BufferReadWrite::removeRequest(tlm::tlm_generic_payload *payload) +void BufferCounterReadWrite::removeRequest(tlm::tlm_generic_payload *payload) { if (payload->is_read()) numberOfReads--; diff --git a/DRAMSys/library/src/controller/scheduler/BufferReadWrite.h b/DRAMSys/library/src/controller/scheduler/BufferCounterReadWrite.h similarity index 89% rename from DRAMSys/library/src/controller/scheduler/BufferReadWrite.h rename to DRAMSys/library/src/controller/scheduler/BufferCounterReadWrite.h index 32835c74..3a27b7b8 100644 --- a/DRAMSys/library/src/controller/scheduler/BufferReadWrite.h +++ b/DRAMSys/library/src/controller/scheduler/BufferCounterReadWrite.h @@ -32,15 +32,15 @@ * Author: Lukas Steiner */ -#ifndef BUFFERREADWRITE_H -#define BUFFERREADWRITE_H +#ifndef BUFFERCOUNTERREADWRITE_H +#define BUFFERCOUNTERREADWRITE_H -#include "BufferIF.h" +#include "BufferCounterIF.h" -class BufferReadWrite : public BufferIF +class BufferCounterReadWrite : public BufferCounterIF { public: - BufferReadWrite(unsigned requestBufferSize); + BufferCounterReadWrite(unsigned requestBufferSize); virtual bool hasBufferSpace() const override; virtual void storeRequest(tlm::tlm_generic_payload *payload) override; virtual void removeRequest(tlm::tlm_generic_payload *payload) override; @@ -51,4 +51,4 @@ private: unsigned numberOfWrites = 0; }; -#endif // BUFFERREADWRITE_H +#endif // BUFFERCOUNTERREADWRITE_H diff --git a/DRAMSys/library/src/controller/scheduler/SchedulerFifo.cpp b/DRAMSys/library/src/controller/scheduler/SchedulerFifo.cpp index ab9fa81e..2a95b40c 100644 --- a/DRAMSys/library/src/controller/scheduler/SchedulerFifo.cpp +++ b/DRAMSys/library/src/controller/scheduler/SchedulerFifo.cpp @@ -34,53 +34,53 @@ #include "SchedulerFifo.h" #include "../../configuration/Configuration.h" -#include "BufferBankwise.h" -#include "BufferReadWrite.h" +#include "BufferCounterBankwise.h" +#include "BufferCounterReadWrite.h" using namespace tlm; SchedulerFifo::SchedulerFifo() { Configuration &config = Configuration::getInstance(); - localBuffer = std::vector>(config.memSpec->numberOfBanks); + buffer = std::vector>(config.memSpec->numberOfBanks); if (config.schedulerBuffer == Configuration::SchedulerBuffer::Bankwise) - buffer = new BufferBankwise(config.requestBufferSize, config.memSpec->numberOfBanks); + bufferCounter = new BufferCounterBankwise(config.requestBufferSize, config.memSpec->numberOfBanks); else if (config.schedulerBuffer == Configuration::SchedulerBuffer::ReadWrite) - buffer = new BufferReadWrite(config.requestBufferSize); + bufferCounter = new BufferCounterReadWrite(config.requestBufferSize); } bool SchedulerFifo::hasBufferSpace() const { - return buffer->hasBufferSpace(); + return bufferCounter->hasBufferSpace(); } void SchedulerFifo::storeRequest(tlm_generic_payload *payload) { - localBuffer[DramExtension::getBank(payload).ID()].push_back(payload); - buffer->storeRequest(payload); + buffer[DramExtension::getBank(payload).ID()].push_back(payload); + bufferCounter->storeRequest(payload); } void SchedulerFifo::removeRequest(tlm_generic_payload *payload) { - localBuffer[DramExtension::getBank(payload).ID()].pop_front(); - buffer->removeRequest(payload); + buffer[DramExtension::getBank(payload).ID()].pop_front(); + bufferCounter->removeRequest(payload); } tlm_generic_payload *SchedulerFifo::getNextRequest(BankMachine *bankMachine) const { unsigned bankID = bankMachine->getBank().ID(); - if (!localBuffer[bankID].empty()) - return localBuffer[bankID].front(); + if (!buffer[bankID].empty()) + return buffer[bankID].front(); else return nullptr; } bool SchedulerFifo::hasFurtherRowHit(Bank bank, Row row) const { - if (localBuffer[bank.ID()].size() >= 2) + if (buffer[bank.ID()].size() >= 2) { - tlm_generic_payload *nextRequest = localBuffer[bank.ID()][1]; + tlm_generic_payload *nextRequest = buffer[bank.ID()][1]; if (DramExtension::getRow(nextRequest) == row) return true; } @@ -89,7 +89,7 @@ bool SchedulerFifo::hasFurtherRowHit(Bank bank, Row row) const bool SchedulerFifo::hasFurtherRequest(Bank bank) const { - if (localBuffer[bank.ID()].size() >= 2) + if (buffer[bank.ID()].size() >= 2) return true; else return false; diff --git a/DRAMSys/library/src/controller/scheduler/SchedulerFifo.h b/DRAMSys/library/src/controller/scheduler/SchedulerFifo.h index c34a095a..7db8cfbd 100644 --- a/DRAMSys/library/src/controller/scheduler/SchedulerFifo.h +++ b/DRAMSys/library/src/controller/scheduler/SchedulerFifo.h @@ -42,7 +42,7 @@ #include "SchedulerIF.h" #include "../../common/dramExtensions.h" #include "../BankMachine.h" -#include "BufferIF.h" +#include "BufferCounterIF.h" class SchedulerFifo : public SchedulerIF { @@ -56,8 +56,8 @@ public: virtual bool hasFurtherRequest(Bank) const override; private: - std::vector> localBuffer; - BufferIF *buffer; + std::vector> buffer; + BufferCounterIF *bufferCounter; }; #endif // SCHEDULERFIFO_H diff --git a/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.cpp b/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.cpp index 8c0b02c8..0a46a016 100644 --- a/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.cpp +++ b/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.cpp @@ -34,42 +34,42 @@ #include "SchedulerFrFcfs.h" #include "../../configuration/Configuration.h" -#include "BufferBankwise.h" -#include "BufferReadWrite.h" +#include "BufferCounterBankwise.h" +#include "BufferCounterReadWrite.h" using namespace tlm; SchedulerFrFcfs::SchedulerFrFcfs() { Configuration &config = Configuration::getInstance(); - localBuffer = std::vector>(config.memSpec->numberOfBanks); + buffer = std::vector>(config.memSpec->numberOfBanks); if (config.schedulerBuffer == Configuration::SchedulerBuffer::Bankwise) - buffer = new BufferBankwise(config.requestBufferSize, config.memSpec->numberOfBanks); + bufferCounter = new BufferCounterBankwise(config.requestBufferSize, config.memSpec->numberOfBanks); else if (config.schedulerBuffer == Configuration::SchedulerBuffer::ReadWrite) - buffer = new BufferReadWrite(config.requestBufferSize); + bufferCounter = new BufferCounterReadWrite(config.requestBufferSize); } bool SchedulerFrFcfs::hasBufferSpace() const { - return buffer->hasBufferSpace(); + return bufferCounter->hasBufferSpace(); } void SchedulerFrFcfs::storeRequest(tlm_generic_payload *payload) { - localBuffer[DramExtension::getBank(payload).ID()].push_back(payload); - buffer->storeRequest(payload); + buffer[DramExtension::getBank(payload).ID()].push_back(payload); + bufferCounter->storeRequest(payload); } void SchedulerFrFcfs::removeRequest(tlm_generic_payload *payload) { - buffer->removeRequest(payload); + bufferCounter->removeRequest(payload); unsigned bankID = DramExtension::getBank(payload).ID(); - for (auto it = localBuffer[bankID].begin(); it != localBuffer[bankID].end(); it++) + for (auto it = buffer[bankID].begin(); it != buffer[bankID].end(); it++) { if (*it == payload) { - localBuffer[bankID].erase(it); + buffer[bankID].erase(it); break; } } @@ -78,20 +78,20 @@ void SchedulerFrFcfs::removeRequest(tlm_generic_payload *payload) tlm_generic_payload *SchedulerFrFcfs::getNextRequest(BankMachine *bankMachine) const { unsigned bankID = bankMachine->getBank().ID(); - if (!localBuffer[bankID].empty()) + if (!buffer[bankID].empty()) { if (bankMachine->getState() == BmState::Activated) { // Search for row hit Row openRow = bankMachine->getOpenRow(); - for (auto it = localBuffer[bankID].begin(); it != localBuffer[bankID].end(); it++) + for (auto it = buffer[bankID].begin(); it != buffer[bankID].end(); it++) { if (DramExtension::getRow(*it) == openRow) return *it; } } // No row hit found or bank precharged - return localBuffer[bankID].front(); + return buffer[bankID].front(); } return nullptr; } @@ -99,7 +99,7 @@ tlm_generic_payload *SchedulerFrFcfs::getNextRequest(BankMachine *bankMachine) c bool SchedulerFrFcfs::hasFurtherRowHit(Bank bank, Row row) const { unsigned rowHitCounter = 0; - for (auto it = localBuffer[bank.ID()].begin(); it != localBuffer[bank.ID()].end(); it++) + for (auto it = buffer[bank.ID()].begin(); it != buffer[bank.ID()].end(); it++) { if (DramExtension::getRow(*it) == row) { @@ -113,5 +113,5 @@ bool SchedulerFrFcfs::hasFurtherRowHit(Bank bank, Row row) const bool SchedulerFrFcfs::hasFurtherRequest(Bank bank) const { - return (localBuffer[bank.ID()].size() >= 2); + return (buffer[bank.ID()].size() >= 2); } diff --git a/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.h b/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.h index d8413b2a..d2dc6ac3 100644 --- a/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.h +++ b/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.h @@ -42,7 +42,7 @@ #include "SchedulerIF.h" #include "../../common/dramExtensions.h" #include "../BankMachine.h" -#include "BufferIF.h" +#include "BufferCounterIF.h" class SchedulerFrFcfs : public SchedulerIF { @@ -56,8 +56,8 @@ public: virtual bool hasFurtherRequest(Bank) const override; private: - std::vector> localBuffer; - BufferIF *buffer; + std::vector> buffer; + BufferCounterIF *bufferCounter; }; #endif // SCHEDULERFRFCFS_H diff --git a/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfsGrp.cpp b/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfsGrp.cpp index b9cb739d..fe6901a4 100644 --- a/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfsGrp.cpp +++ b/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfsGrp.cpp @@ -34,43 +34,43 @@ #include "SchedulerFrFcfsGrp.h" #include "../../configuration/Configuration.h" -#include "BufferBankwise.h" -#include "BufferReadWrite.h" +#include "BufferCounterBankwise.h" +#include "BufferCounterReadWrite.h" using namespace tlm; SchedulerFrFcfsGrp::SchedulerFrFcfsGrp() { Configuration &config = Configuration::getInstance(); - localBuffer = std::vector>(config.memSpec->numberOfBanks); + buffer = std::vector>(config.memSpec->numberOfBanks); if (config.schedulerBuffer == Configuration::SchedulerBuffer::Bankwise) - buffer = new BufferBankwise(config.requestBufferSize, config.memSpec->numberOfBanks); + bufferCounter = new BufferCounterBankwise(config.requestBufferSize, config.memSpec->numberOfBanks); else if (config.schedulerBuffer == Configuration::SchedulerBuffer::ReadWrite) - buffer = new BufferReadWrite(config.requestBufferSize); + bufferCounter = new BufferCounterReadWrite(config.requestBufferSize); } bool SchedulerFrFcfsGrp::hasBufferSpace() const { - return buffer->hasBufferSpace(); + return bufferCounter->hasBufferSpace(); } void SchedulerFrFcfsGrp::storeRequest(tlm_generic_payload *payload) { - localBuffer[DramExtension::getBank(payload).ID()].push_back(payload); - buffer->storeRequest(payload); + buffer[DramExtension::getBank(payload).ID()].push_back(payload); + bufferCounter->storeRequest(payload); } void SchedulerFrFcfsGrp::removeRequest(tlm_generic_payload *payload) { - buffer->removeRequest(payload); + bufferCounter->removeRequest(payload); lastCommand = payload->get_command(); unsigned bankID = DramExtension::getBank(payload).ID(); - for (auto it = localBuffer[bankID].begin(); it != localBuffer[bankID].end(); it++) + for (auto it = buffer[bankID].begin(); it != buffer[bankID].end(); it++) { if (*it == payload) { - localBuffer[bankID].erase(it); + buffer[bankID].erase(it); break; } } @@ -79,14 +79,14 @@ void SchedulerFrFcfsGrp::removeRequest(tlm_generic_payload *payload) tlm_generic_payload *SchedulerFrFcfsGrp::getNextRequest(BankMachine *bankMachine) const { unsigned bankID = bankMachine->getBank().ID(); - if (!localBuffer[bankID].empty()) + if (!buffer[bankID].empty()) { if (bankMachine->getState() == BmState::Activated) { // Filter all row hits Row openRow = bankMachine->getOpenRow(); std::list rowHits; - for (auto it = localBuffer[bankID].begin(); it != localBuffer[bankID].end(); it++) + for (auto it = buffer[bankID].begin(); it != buffer[bankID].end(); it++) { if (DramExtension::getRow(*it) == openRow) rowHits.push_back(*it); @@ -116,7 +116,7 @@ tlm_generic_payload *SchedulerFrFcfsGrp::getNextRequest(BankMachine *bankMachine } } // No row hit found or bank precharged - return localBuffer[bankID].front(); + return buffer[bankID].front(); } return nullptr; } @@ -124,7 +124,7 @@ tlm_generic_payload *SchedulerFrFcfsGrp::getNextRequest(BankMachine *bankMachine bool SchedulerFrFcfsGrp::hasFurtherRowHit(Bank bank, Row row) const { unsigned rowHitCounter = 0; - for (auto it = localBuffer[bank.ID()].begin(); it != localBuffer[bank.ID()].end(); it++) + for (auto it = buffer[bank.ID()].begin(); it != buffer[bank.ID()].end(); it++) { if (DramExtension::getRow(*it) == row) { @@ -138,7 +138,7 @@ bool SchedulerFrFcfsGrp::hasFurtherRowHit(Bank bank, Row row) const bool SchedulerFrFcfsGrp::hasFurtherRequest(Bank bank) const { - if (localBuffer[bank.ID()].size() >= 2) + if (buffer[bank.ID()].size() >= 2) return true; else return false; diff --git a/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfsGrp.h b/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfsGrp.h index af2e6ad4..670ccdf8 100644 --- a/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfsGrp.h +++ b/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfsGrp.h @@ -42,7 +42,7 @@ #include "SchedulerIF.h" #include "../../common/dramExtensions.h" #include "../BankMachine.h" -#include "BufferIF.h" +#include "BufferCounterIF.h" class SchedulerFrFcfsGrp : public SchedulerIF { @@ -56,9 +56,9 @@ public: virtual bool hasFurtherRequest(Bank) const override; private: - std::vector> localBuffer; + std::vector> buffer; tlm::tlm_command lastCommand = tlm::TLM_READ_COMMAND; - BufferIF *buffer; + BufferCounterIF *bufferCounter; }; #endif // SCHEDULERFRFCFSGRP_H