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new memconfigs

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This commit is contained in:
robert
2014-04-20 22:26:08 +02:00
parent b75366edda
commit dc456385cc
13 changed files with 253 additions and 1 deletions
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1
dram/resources/.gitignore vendored
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*.pyc
configs
simulations

27
dram/resources/configs/amconfigs/am_ddr4 (4th copy).xml Executable file
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<?xml version="1.0" encoding="UTF-8" standalone="yes" ?>
<!--
<dramconfig>
<addressmap length="29">
<channel from="27" to="28" />
<bank from="24" to="26" />
<row from="11" to="23" />
<colum from="4" to="10" />
<bytes from="0" to="3" />
</addressmap>
</dramconfig>
-->
<dramconfig>
<addressmap length="29">
<channel from="27" to="28" />
<row from="15" to="26" />
<bank from="11" to="14" />
<colum from="4" to="10" />
<bytes from="0" to="3" />
<!-- <channel from="27" to="28" />
<row from="14" to="26" />
<bytes from="10" to="13" />
<colum from="3" to="9" />
<bank from="0" to="2" /> -->
</addressmap>
</dramconfig>

9
dram/resources/configs/amconfigs/am_highHits.xml Normal file
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<?xml version="1.0" encoding="UTF-8" standalone="yes" ?>
<!-- highest hit rate -->
<dramconfig>
<addressmap length="32">
<row from="19" to="31" />
<bank from="15" to="18" />
<colum from="5" to="14" />
</addressmap>
</dramconfig>

9
dram/resources/configs/amconfigs/am_highPara.xml Executable file
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<?xml version="1.0" encoding="UTF-8" standalone="yes" ?>
<!-- highest bank parallelism - high hits -->
<dramconfig>
<addressmap length="32">
<row from="19" to="31" />
<colum from="9" to="18" />
<bank from="5" to="8" />
</addressmap>
</dramconfig>

11
dram/resources/configs/amconfigs/am_lowHits.xml Executable file
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<?xml version="1.0" encoding="UTF-8" standalone="yes" ?>
<!-- highest bank parallism - low hits
-->
<dramconfig>
<addressmap length="32">
<colum from="24" to="31" />
<row from="9" to="23" />
<bank from="5" to="8" />
</addressmap>
</dramconfig>

12
dram/resources/configs/amconfigs/am_lowPara.xml Executable file
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<?xml version="1.0" encoding="UTF-8" standalone="yes" ?>
<!-- low bank parallelism - high hits -->
<dramconfig>
<addressmap length="32">
<bank from="30" to="31" />
<row from="15" to="29" />
<colum from="5" to="14" />
</addressmap>
</dramconfig>

11
dram/resources/configs/memconfigs/fifo_n100.xml Normal file
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<memspec>
<memconfig>
<parameter id="bankwiseLogic" type="bool" value="0" />
<parameter id="openPagePolicy" type="bool" value="1" />
<parameter id="adaptiveOpenPagePolicy" type="bool" value="0" />
<parameter id="refreshAwareScheduling" type="bool" value="0" />
<parameter id="maxNrOfTransactionsInDram" type="uint" value="100" />
<parameter id="scheduler" type="string" value="FR_FCFS" />
<parameter id="capsize" type="uint" value="5" />
</memconfig>
</memspec>

11
dram/resources/configs/memconfigs/fifo_n1000.xml Normal file
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<memspec>
<memconfig>
<parameter id="bankwiseLogic" type="bool" value="0" />
<parameter id="openPagePolicy" type="bool" value="1" />
<parameter id="adaptiveOpenPagePolicy" type="bool" value="0" />
<parameter id="refreshAwareScheduling" type="bool" value="0" />
<parameter id="maxNrOfTransactionsInDram" type="uint" value="1000" />
<parameter id="scheduler" type="string" value="FIFO" />
<parameter id="capsize" type="uint" value="5" />
</memconfig>
</memspec>

11
dram/resources/configs/memconfigs/fifo_n20.xml Normal file
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<memspec>
<memconfig>
<parameter id="bankwiseLogic" type="bool" value="0" />
<parameter id="openPagePolicy" type="bool" value="1" />
<parameter id="adaptiveOpenPagePolicy" type="bool" value="0" />
<parameter id="refreshAwareScheduling" type="bool" value="0" />
<parameter id="maxNrOfTransactionsInDram" type="uint" value="20" />
<parameter id="scheduler" type="string" value="FR_FCFS" />
<parameter id="capsize" type="uint" value="5" />
</memconfig>
</memspec>

11
dram/resources/configs/memconfigs/fifo_n5.xml Normal file
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<memspec>
<memconfig>
<parameter id="bankwiseLogic" type="bool" value="0" />
<parameter id="openPagePolicy" type="bool" value="1" />
<parameter id="adaptiveOpenPagePolicy" type="bool" value="0" />
<parameter id="refreshAwareScheduling" type="bool" value="0" />
<parameter id="maxNrOfTransactionsInDram" type="uint" value="5" />
<parameter id="scheduler" type="string" value="FR_FCFS" />
<parameter id="capsize" type="uint" value="5" />
</memconfig>
</memspec>

11
dram/resources/configs/memconfigs/fifo_n50.xml Normal file
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<memspec>
<memconfig>
<parameter id="bankwiseLogic" type="bool" value="0" />
<parameter id="openPagePolicy" type="bool" value="1" />
<parameter id="adaptiveOpenPagePolicy" type="bool" value="0" />
<parameter id="refreshAwareScheduling" type="bool" value="0" />
<parameter id="maxNrOfTransactionsInDram" type="uint" value="50" />
<parameter id="scheduler" type="string" value="FR_FCFS" />
<parameter id="capsize" type="uint" value="5" />
</memconfig>
</memspec>

64
dram/resources/configs/memspecs/DDR4.xml Normal file
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<!DOCTYPE memspec SYSTEM "memspec.dtd">
<memspec>
<parameter id="memoryId" type="string" value="MICRON_4Gb_DDR4-2400_8bit_A" />
<parameter id="memoryType" type="string" value="DDR4" />
<memarchitecturespec>
<parameter id="width" type="uint" value="8" />
<parameter id="nbrOfBankGroups" type="uint" value="4" />
<parameter id="nbrOfBanks" type="uint" value="16" />
<parameter id="nbrOfRanks" type="uint" value="1" />
<parameter id="nbrOfColumns" type="uint" value="1024" />
<parameter id="nbrOfRows" type="uint" value="32768" />
<parameter id="dataRate" type="uint" value="2" />
<parameter id="burstLength" type="uint" value="8" />
</memarchitecturespec>
<memtimingspec>
<parameter id="clkMhz" type="double" value="1200" />
<!-- <parameter id="REFI" type="uint" value="4680" />
-->
<parameter id="REFI" type="uint" value="1000" />
<parameter id="RFC" type="uint" value="313" />
<parameter id="RL" type="uint" value="16" />
<parameter id="WL" type="uint" value="16" />
<parameter id="CL" type="uint" value="16" />
<parameter id="AL" type="uint" value="0" />
<parameter id="RP" type="uint" value="16" />
<parameter id="RAS" type="uint" value="39" />
<parameter id="RCD" type="uint" value="16" />
<parameter id="RC" type="uint" value="55" />
<parameter id="FAW" type="uint" value="26" />
<parameter id="RTP" type="uint" value="12" />
<parameter id="WR" type="uint" value="18" />
<parameter id="RRD_S" type="uint" value="4" />
<parameter id="RRD_L" type="uint" value="6" />
<parameter id="CCD_S" type="uint" value="4" />
<parameter id="CCD_L" type="uint" value="6" />
<parameter id="WTR_S" type="uint" value="3" />
<parameter id="WTR_L" type="uint" value="9" />
<parameter id="DQSCK" type="uint" value="2" />
<parameter id="XP" type="uint" value="8" />
<parameter id="XPDLL" type="uint" value="325" />
<parameter id="XS" type="uint" value="324" />
<parameter id="XSDLL" type="uint" value="512" />
<parameter id="CKE" type="uint" value="6" />
<parameter id="CKESR" type="uint" value="7" />
</memtimingspec>
<mempowerspec>
<parameter id="idd0" type="double" value="60.75" />
<parameter id="idd02" type="double" value="4.05" />
<parameter id="idd2p0" type="double" value="17.0" />
<parameter id="idd2p1" type="double" value="17.0" />
<parameter id="idd2n" type="double" value="38.25" />
<parameter id="idd3p0" type="double" value="22.5" />
<parameter id="idd3p1" type="double" value="22.5" />
<parameter id="idd3n" type="double" value="44.0" />
<parameter id="idd4r" type="double" value="184.5" />
<parameter id="idd4w" type="double" value="168.75" />
<parameter id="idd5" type="double" value="118.0" />
<parameter id="idd6" type="double" value="20.25" />
<parameter id="idd62" type="double" value="2.6" />
<parameter id="vdd" type="double" value="1.2" />
<parameter id="vdd2" type="double" value="2.5" />
</mempowerspec>
</memspec>

66
dram/resources/configs/memspecs/WideIO.xml Normal file
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<!DOCTYPE memspec SYSTEM "memspec.dtd">
<memspec>
<parameter id="memoryId" type="string" value="Matze_WideIO" />
<parameter id="memoryType" type="string" value="WIDEIO_SDR" />
<memarchitecturespec>
<parameter id="width" type="uint" value="128" />
<parameter id="nbrOfBanks" type="uint" value="8" />
<!-- <parameter id="nbrOfRanks" type="uint" value="1" />-->
<parameter id="nbrOfColumns" type="uint" value="128" />-
<parameter id="nbrOfRows" type="uint" value="8192" />
<parameter id="dataRate" type="uint" value="1" />
<parameter id="burstLength" type="uint" value="4" />
</memarchitecturespec>
<memtimingspec>
<parameter id="clkMhz" type="double" value="166" />
<parameter id="RC" type="uint" value="9" /><!--tRP+tRAS-->
<parameter id="RCD" type="uint" value="3" />
<parameter id="RL" type="uint" value="3" />
<parameter id="RP" type="uint" value="3" />
<parameter id="RFC" type="uint" value="22" />
<parameter id="RAS" type="uint" value="6" />
<parameter id="WL" type="uint" value="1" />
<parameter id="AL" type="uint" value="0" />
<!--<parameter id="DQSCK" type="uint" value="1" />-->
<parameter id="RTP" type="uint" value="4" />
<parameter id="WR" type="uint" value="2" />
<parameter id="XP" type="uint" value="2" />
<!--<parameter id="XPDLL" type="uint" value="2" />-->
<parameter id="XS" type="uint" value="20" /><!--tRFC+2clk-->
<!--<parameter id="XSDLL" type="uint" value="20" />-->
<parameter id="REFI" type="uint" value="1300" />
<!--<parameter id="CL" type="uint" value="3" />-->
<parameter id="TAW" type="uint" value="10" />
<parameter id="RRD" type="uint" value="2" />
<parameter id="CCD" type="uint" value="1" />
<parameter id="WTR" type="uint" value="3" />
<parameter id="CKE" type="uint" value="3" />
<parameter id="CKESR" type="uint" value="3" />
</memtimingspec>
<mempowerspec>
<!-- <parameter id="idd0" type="double" value="5.88" />
<parameter id="idd02" type="double" value="21.18" />
<parameter id="idd2p0" type="double" value="0.05" />
<parameter id="idd2p02" type="double" value="0.17" />
<parameter id="idd2p1" type="double" value="0.05" />
<parameter id="idd2p12" type="double" value="0.17" />
<parameter id="idd2n" type="double" value="0.13" />
<parameter id="idd2n2" type="double" value="4.04" />
<parameter id="idd3p0" type="double" value="0.25" />
<parameter id="idd3p02" type="double" value="1.49" />
<parameter id="idd3p1" type="double" value="0.25" />
<parameter id="idd3p12" type="double" value="1.49" />
<parameter id="idd3n" type="double" value="0.52" />
<parameter id="idd3n2" type="double" value="6.55" />
<parameter id="idd4r" type="double" value="1.41" />
<parameter id="idd4r2" type="double" value="85.73" />
<parameter id="idd4w" type="double" value="1.42" />
<parameter id="idd4w2" type="double" value="60.79" />
<parameter id="idd5" type="double" value="14.43" />
<parameter id="idd52" type="double" value="48.17" />
<parameter id="idd6" type="double" value="0.07" />
<parameter id="idd62" type="double" value="0.27" />
<parameter id="vdd" type="double" value="1.8" />
<parameter id="vdd2" type="double" value="1.2" />-->
</mempowerspec>
</memspec>