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Give controller access to address decoder.

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This commit is contained in:
Lukas Steiner
2022-04-20 16:36:02 +02:00
parent 38057667b0
commit d56f62fd6d
22 changed files with 144 additions and 215 deletions
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151
DRAMSys/library/src/common/dramExtensions.cpp
View File

@@ -54,14 +54,14 @@ DramExtension::DramExtension(Thread thread, Channel channel, Rank rank,
row(row), column(column), burstLength(burstLength),
threadPayloadID(threadPayloadID), channelPayloadID(channelPayloadID) {}
void DramExtension::setExtension(tlm_generic_payload *payload,
void DramExtension::setExtension(tlm_generic_payload& payload,
Thread thread, Channel channel, Rank rank,
BankGroup bankGroup, Bank bank, Row row,
Column column, unsigned int burstLength,
uint64_t threadPayloadID, uint64_t channelPayloadID)
{
DramExtension *extension = nullptr;
payload->get_extension(extension);
DramExtension* extension = nullptr;
payload.get_extension(extension);
if (extension != nullptr)
{
@@ -81,148 +81,78 @@ void DramExtension::setExtension(tlm_generic_payload *payload,
extension = new DramExtension(thread, channel, rank, bankGroup,
bank, row, column, burstLength,
threadPayloadID, channelPayloadID);
payload->set_auto_extension(extension);
payload.set_auto_extension(extension);
}
}
void DramExtension::setExtension(tlm_generic_payload &payload,
Thread thread, Channel channel, Rank rank,
BankGroup bankGroup, Bank bank, Row row,
Column column, unsigned int burstLength,
uint64_t threadPayloadID, uint64_t channelPayloadID)
void DramExtension::setPayloadIDs(tlm_generic_payload& payload, uint64_t threadPayloadID, uint64_t channelPayloadID)
{
setExtension(&payload, thread, channel, rank, bankGroup,
bank, row, column, burstLength,
threadPayloadID, channelPayloadID);
}
void DramExtension::setPayloadIDs(tlm_generic_payload *payload, uint64_t threadPayloadID, uint64_t channelPayloadID)
{
DramExtension *extension;
payload->get_extension(extension);
DramExtension* extension = nullptr;
payload.get_extension(extension);
assert(extension != nullptr);
extension->threadPayloadID = threadPayloadID;
extension->channelPayloadID = channelPayloadID;
}
void DramExtension::setPayloadIDs(tlm_generic_payload &payload, uint64_t threadPayloadID, uint64_t channelPayloadID)
DramExtension& DramExtension::getExtension(const tlm_generic_payload& payload)
{
DramExtension::setPayloadIDs(&payload, threadPayloadID, channelPayloadID);
}
DramExtension &DramExtension::getExtension(const tlm_generic_payload *payload)
{
DramExtension *result = nullptr;
payload->get_extension(result);
sc_assert(result != nullptr);
DramExtension* result = nullptr;
payload.get_extension(result);
assert(result != nullptr);
return *result;
}
DramExtension &DramExtension::getExtension(const tlm_generic_payload &payload)
{
return DramExtension::getExtension(&payload);
}
Thread DramExtension::getThread(const tlm_generic_payload *payload)
Thread DramExtension::getThread(const tlm_generic_payload& payload)
{
return DramExtension::getExtension(payload).getThread();
}
Thread DramExtension::getThread(const tlm_generic_payload &payload)
{
return DramExtension::getThread(&payload);
}
Channel DramExtension::getChannel(const tlm_generic_payload *payload)
Channel DramExtension::getChannel(const tlm_generic_payload& payload)
{
return DramExtension::getExtension(payload).getChannel();
}
Channel DramExtension::getChannel(const tlm_generic_payload &payload)
{
return DramExtension::getChannel(&payload);
}
Rank DramExtension::getRank(const tlm_generic_payload *payload)
Rank DramExtension::getRank(const tlm_generic_payload& payload)
{
return DramExtension::getExtension(payload).getRank();
}
Rank DramExtension::getRank(const tlm_generic_payload &payload)
{
return DramExtension::getRank(&payload);
}
BankGroup DramExtension::getBankGroup(const tlm_generic_payload *payload)
BankGroup DramExtension::getBankGroup(const tlm_generic_payload& payload)
{
return DramExtension::getExtension(payload).getBankGroup();
}
BankGroup DramExtension::getBankGroup(const tlm_generic_payload &payload)
{
return DramExtension::getBankGroup(&payload);
}
Bank DramExtension::getBank(const tlm_generic_payload *payload)
Bank DramExtension::getBank(const tlm_generic_payload& payload)
{
return DramExtension::getExtension(payload).getBank();
}
Bank DramExtension::getBank(const tlm_generic_payload &payload)
{
return DramExtension::getBank(&payload);
}
Row DramExtension::getRow(const tlm_generic_payload *payload)
Row DramExtension::getRow(const tlm_generic_payload& payload)
{
return DramExtension::getExtension(payload).getRow();
}
Row DramExtension::getRow(const tlm_generic_payload &payload)
{
return DramExtension::getRow(&payload);
}
Column DramExtension::getColumn(const tlm_generic_payload *payload)
Column DramExtension::getColumn(const tlm_generic_payload& payload)
{
return DramExtension::getExtension(payload).getColumn();
}
Column DramExtension::getColumn(const tlm_generic_payload &payload)
{
return DramExtension::getColumn(&payload);
}
unsigned DramExtension::getBurstLength(const tlm_generic_payload *payload)
unsigned DramExtension::getBurstLength(const tlm_generic_payload& payload)
{
return DramExtension::getExtension(payload).getBurstLength();
}
unsigned DramExtension::getBurstLength(const tlm_generic_payload &payload)
{
return DramExtension::getBurstLength(&payload);
}
uint64_t DramExtension::getThreadPayloadID(const tlm_generic_payload *payload)
uint64_t DramExtension::getThreadPayloadID(const tlm_generic_payload& payload)
{
return DramExtension::getExtension(payload).getThreadPayloadID();
}
uint64_t DramExtension::getThreadPayloadID(const tlm_generic_payload &payload)
{
return DramExtension::getThreadPayloadID(&payload);
}
uint64_t DramExtension::getChannelPayloadID(const tlm_generic_payload *payload)
uint64_t DramExtension::getChannelPayloadID(const tlm_generic_payload& payload)
{
return DramExtension::getExtension(payload).getChannelPayloadID();
}
uint64_t DramExtension::getChannelPayloadID(const tlm_generic_payload &payload)
{
return DramExtension::getChannelPayloadID(&payload);
}
tlm_extension_base *DramExtension::clone() const
{
return new DramExtension(thread, channel, rank, bankGroup, bank, row, column,
@@ -304,50 +234,35 @@ void GenerationExtension::copy_from(const tlm_extension_base &ext)
}
void GenerationExtension::setExtension(tlm_generic_payload *payload, const sc_time &timeOfGeneration)
void GenerationExtension::setExtension(tlm_generic_payload& payload, const sc_time& _timeOfGeneration)
{
GenerationExtension *extension = nullptr;
payload->get_extension(extension);
GenerationExtension* extension = nullptr;
payload.get_extension(extension);
if (extension != nullptr)
{
extension->timeOfGeneration = timeOfGeneration;
extension->timeOfGeneration = _timeOfGeneration;
}
else
{
extension = new GenerationExtension(timeOfGeneration);
payload->set_auto_extension(extension);
extension = new GenerationExtension(_timeOfGeneration);
payload.set_auto_extension(extension);
}
}
void GenerationExtension::setExtension(tlm_generic_payload &payload, const sc_time &timeOfGeneration)
GenerationExtension& GenerationExtension::getExtension(const tlm_generic_payload& payload)
{
GenerationExtension::setExtension(&payload, timeOfGeneration);
}
GenerationExtension &GenerationExtension::getExtension(const tlm_generic_payload *payload)
{
GenerationExtension *result = nullptr;
payload->get_extension(result);
sc_assert(result != nullptr);
GenerationExtension* result = nullptr;
payload.get_extension(result);
assert(result != nullptr);
return *result;
}
GenerationExtension &GenerationExtension::getExtension(const tlm_generic_payload &payload)
{
return GenerationExtension::getExtension(&payload);
}
sc_time GenerationExtension::getTimeOfGeneration(const tlm_generic_payload *payload)
sc_time GenerationExtension::getTimeOfGeneration(const tlm_generic_payload& payload)
{
return GenerationExtension::getExtension(payload).timeOfGeneration;
}
sc_time GenerationExtension::getTimeOfGeneration(const tlm_generic_payload &payload)
{
return GenerationExtension::getTimeOfGeneration(&payload);
}
//THREAD
bool operator ==(const Thread &lhs, const Thread &rhs)
{

25
DRAMSys/library/src/common/dramExtensions.h
View File

@@ -166,45 +166,27 @@ public:
tlm::tlm_extension_base *clone() const override;
void copy_from(const tlm::tlm_extension_base &ext) override;
static void setExtension(tlm::tlm_generic_payload *payload,
Thread thread, Channel channel, Rank rank,
BankGroup bankGroup, Bank bank, Row row,
Column column, unsigned int burstLength,
uint64_t threadPayloadID, uint64_t channelPayloadID);
static void setExtension(tlm::tlm_generic_payload &payload,
Thread thread, Channel channel, Rank rank,
BankGroup bankGroup, Bank bank, Row row,
Column column, unsigned int burstLength,
uint64_t threadPayloadID, uint64_t channelPayloadID);
static DramExtension &getExtension(const tlm::tlm_generic_payload *payload);
static DramExtension &getExtension(const tlm::tlm_generic_payload &payload);
static void setPayloadIDs(tlm::tlm_generic_payload *payload,
uint64_t threadPayloadID, uint64_t channelPayloadID);
static void setPayloadIDs(tlm::tlm_generic_payload &payload,
uint64_t threadPayloadID, uint64_t channelPayloadID);
// Used for convience, caller could also use getExtension(..) to access these field
static Thread getThread(const tlm::tlm_generic_payload *payload);
// Used for convenience, caller could also use getExtension(..) to access these field
static Thread getThread(const tlm::tlm_generic_payload &payload);
static Channel getChannel(const tlm::tlm_generic_payload *payload);
static Channel getChannel(const tlm::tlm_generic_payload &payload);
static Rank getRank(const tlm::tlm_generic_payload *payload);
static Rank getRank(const tlm::tlm_generic_payload &payload);
static BankGroup getBankGroup(const tlm::tlm_generic_payload *payload);
static BankGroup getBankGroup(const tlm::tlm_generic_payload &payload);
static Bank getBank(const tlm::tlm_generic_payload *payload);
static Bank getBank(const tlm::tlm_generic_payload &payload);
static Row getRow(const tlm::tlm_generic_payload *payload);
static Row getRow(const tlm::tlm_generic_payload &payload);
static Column getColumn(const tlm::tlm_generic_payload *payload);
static Column getColumn(const tlm::tlm_generic_payload &payload);
static unsigned getBurstLength(const tlm::tlm_generic_payload *payload);
static unsigned getBurstLength(const tlm::tlm_generic_payload &payload);
static uint64_t getThreadPayloadID(const tlm::tlm_generic_payload *payload);
static uint64_t getThreadPayloadID(const tlm::tlm_generic_payload &payload);
static uint64_t getChannelPayloadID(const tlm::tlm_generic_payload *payload);
static uint64_t getChannelPayloadID(const tlm::tlm_generic_payload &payload);
Thread getThread() const;
@@ -243,11 +225,8 @@ public:
: timeOfGeneration(timeOfGeneration) {}
tlm::tlm_extension_base *clone() const override;
void copy_from(const tlm::tlm_extension_base &ext) override;
static void setExtension(tlm::tlm_generic_payload *payload, const sc_core::sc_time &timeOfGeneration);
static void setExtension(tlm::tlm_generic_payload &payload, const sc_core::sc_time &timeOfGeneration);
static GenerationExtension &getExtension(const tlm::tlm_generic_payload *payload);
static void setExtension(tlm::tlm_generic_payload &payload, const sc_core::sc_time &_timeOfGeneration);
static GenerationExtension &getExtension(const tlm::tlm_generic_payload &payload);
static sc_core::sc_time getTimeOfGeneration(const tlm::tlm_generic_payload *payload);
static sc_core::sc_time getTimeOfGeneration(const tlm::tlm_generic_payload &payload);
private:

16
DRAMSys/library/src/controller/BankMachine.cpp
View File

@@ -57,7 +57,7 @@ void BankMachine::updateState(Command command)
{
case Command::ACT:
state = State::Activated;
openRow = DramExtension::getRow(currentPayload);
openRow = DramExtension::getRow(*currentPayload);
keepTrans = true;
refreshManagementCounter++;
break;
@@ -180,7 +180,7 @@ sc_time BankMachineOpen::start()
assert(!keepTrans || currentPayload != nullptr);
if (keepTrans)
{
if (DramExtension::getRow(newPayload) == openRow)
if (DramExtension::getRow(*newPayload) == openRow)
currentPayload = newPayload;
}
else
@@ -192,7 +192,7 @@ sc_time BankMachineOpen::start()
nextCommand = Command::ACT;
else if (state == State::Activated)
{
if (DramExtension::getRow(currentPayload) == openRow) // row hit
if (DramExtension::getRow(*currentPayload) == openRow) // row hit
{
assert(currentPayload->is_read() || currentPayload->is_write());
if (currentPayload->is_read())
@@ -232,7 +232,7 @@ sc_time BankMachineClosed::start()
assert(!keepTrans || currentPayload != nullptr);
if (keepTrans)
{
if (DramExtension::getRow(newPayload) == openRow)
if (DramExtension::getRow(*newPayload) == openRow)
currentPayload = newPayload;
}
else
@@ -279,7 +279,7 @@ sc_time BankMachineOpenAdaptive::start()
assert(!keepTrans || currentPayload != nullptr);
if (keepTrans)
{
if (DramExtension::getRow(newPayload) == openRow)
if (DramExtension::getRow(*newPayload) == openRow)
currentPayload = newPayload;
}
else
@@ -291,7 +291,7 @@ sc_time BankMachineOpenAdaptive::start()
nextCommand = Command::ACT;
else if (state == State::Activated)
{
if (DramExtension::getRow(currentPayload) == openRow) // row hit
if (DramExtension::getRow(*currentPayload) == openRow) // row hit
{
if (scheduler.hasFurtherRequest(bank, currentPayload->get_command())
&& !scheduler.hasFurtherRowHit(bank, openRow, currentPayload->get_command()))
@@ -343,7 +343,7 @@ sc_time BankMachineClosedAdaptive::start()
assert(!keepTrans || currentPayload != nullptr);
if (keepTrans)
{
if (DramExtension::getRow(newPayload) == openRow)
if (DramExtension::getRow(*newPayload) == openRow)
currentPayload = newPayload;
}
else
@@ -355,7 +355,7 @@ sc_time BankMachineClosedAdaptive::start()
nextCommand = Command::ACT;
else if (state == State::Activated)
{
if (DramExtension::getRow(currentPayload) == openRow) // row hit
if (DramExtension::getRow(*currentPayload) == openRow) // row hit
{
if (scheduler.hasFurtherRowHit(bank, openRow, currentPayload->get_command()))
{

19
DRAMSys/library/src/controller/Controller.cpp
View File

@@ -69,8 +69,9 @@
using namespace sc_core;
using namespace tlm;
Controller::Controller(const sc_module_name& name, const Configuration& config) :
ControllerIF(name, config), thinkDelayFw(config.thinkDelayFw), thinkDelayBw(config.thinkDelayBw),
Controller::Controller(const sc_module_name& name, const Configuration& config, const AddressDecoder& addressDecoder) :
ControllerIF(name, config), addressDecoder(addressDecoder),
thinkDelayFw(config.thinkDelayFw), thinkDelayBw(config.thinkDelayBw),
phyDelayFw(config.phyDelayFw), phyDelayBw(config.phyDelayBw)
{
SC_METHOD(controllerMethod);
@@ -283,8 +284,8 @@ void Controller::controllerMethod()
tlm_generic_payload *payload = std::get<CommandTuple::Payload>(commandTuple);
if (command != Command::NOP) // can happen with FIFO strict
{
Rank rank = DramExtension::getRank(payload);
Bank bank = DramExtension::getBank(payload);
Rank rank = DramExtension::getRank(*payload);
Bank bank = DramExtension::getBank(*payload);
if (command.isRankCommand())
{
@@ -401,14 +402,14 @@ void Controller::manageRequests(const sc_time &delay)
{
if (scheduler->hasBufferSpace())
{
NDEBUG_UNUSED(uint64_t id) = DramExtension::getChannelPayloadID(transToAcquire.payload);
NDEBUG_UNUSED(uint64_t id) = DramExtension::getChannelPayloadID(*transToAcquire.payload);
PRINTDEBUGMESSAGE(name(), "Payload " + std::to_string(id) + " entered system.");
if (totalNumberOfPayloads == 0)
idleTimeCollector.end();
totalNumberOfPayloads++;
Rank rank = DramExtension::getRank(transToAcquire.payload);
Rank rank = DramExtension::getRank(*transToAcquire.payload);
if (ranksNumberOfPayloads[rank.ID()] == 0)
powerDownManagers[rank.ID()]->triggerExit();
@@ -417,7 +418,7 @@ void Controller::manageRequests(const sc_time &delay)
scheduler->storeRequest(*transToAcquire.payload);
transToAcquire.payload->acquire();
Bank bank = DramExtension::getBank(transToAcquire.payload);
Bank bank = DramExtension::getBank(*transToAcquire.payload);
bankMachines[bank.ID()]->start();
transToAcquire.payload->set_response_status(TLM_OK_RESPONSE);
@@ -440,10 +441,10 @@ void Controller::manageResponses()
assert(transToRelease.time >= sc_time_stamp());
if (transToRelease.time == sc_time_stamp())
{
NDEBUG_UNUSED(uint64_t id) = DramExtension::getChannelPayloadID(transToRelease.payload);
NDEBUG_UNUSED(uint64_t id) = DramExtension::getChannelPayloadID(*transToRelease.payload);
PRINTDEBUGMESSAGE(name(), "Payload " + std::to_string(id) + " left system.");
numberOfBeatsServed += DramExtension::getBurstLength(transToRelease.payload);
numberOfBeatsServed += DramExtension::getBurstLength(*transToRelease.payload);
transToRelease.payload->release();
transToRelease.payload = nullptr;
totalNumberOfPayloads--;

5
DRAMSys/library/src/controller/Controller.h
View File

@@ -48,11 +48,12 @@
#include "refresh/RefreshManagerIF.h"
#include "powerdown/PowerDownManagerIF.h"
#include "respqueue/RespQueueIF.h"
#include "../simulation/AddressDecoder.h"
class Controller : public ControllerIF
{
public:
Controller(const sc_core::sc_module_name& name, const Configuration& config);
Controller(const sc_core::sc_module_name& name, const Configuration& config, const AddressDecoder& addressDecoder);
SC_HAS_PROCESS(Controller);
protected:
@@ -87,6 +88,8 @@ private:
std::vector<std::unique_ptr<RefreshManagerIF>> refreshManagers;
std::vector<std::unique_ptr<PowerDownManagerIF>> powerDownManagers;
const AddressDecoder& addressDecoder;
struct Transaction
{
tlm::tlm_generic_payload *payload = nullptr;

4
DRAMSys/library/src/controller/ControllerRecordable.cpp
View File

@@ -40,8 +40,8 @@ using namespace sc_core;
using namespace tlm;
ControllerRecordable::ControllerRecordable(const sc_module_name &name, const Configuration& config,
TlmRecorder& tlmRecorder)
: Controller(name, config), tlmRecorder(tlmRecorder),
const AddressDecoder& addressDecoder, TlmRecorder& tlmRecorder)
: Controller(name, config, addressDecoder), tlmRecorder(tlmRecorder),
activeTimeMultiplier(config.memSpec->tCK / config.memSpec->dataRate), enableWindowing(config.enableWindowing),
windowSizeTime(config.windowSize * memSpec.tCK)
{

3
DRAMSys/library/src/controller/ControllerRecordable.h
View File

@@ -43,7 +43,8 @@
class ControllerRecordable final : public Controller
{
public:
ControllerRecordable(const sc_core::sc_module_name &name, const Configuration& config, TlmRecorder& tlmRecorder);
ControllerRecordable(const sc_core::sc_module_name &name, const Configuration& config,
const AddressDecoder& addressDecoder, TlmRecorder& tlmRecorder);
~ControllerRecordable() override = default;
protected:

8
DRAMSys/library/src/controller/cmdmux/CmdMuxOldest.cpp
View File

@@ -52,7 +52,7 @@ CommandTuple::Type CmdMuxOldest::selectCommand(const ReadyCommands &readyCommand
{
newTimestamp = std::get<CommandTuple::Timestamp>(*it) +
memSpec.getCommandLength(std::get<CommandTuple::Command>(*it));
newPayloadID = DramExtension::getChannelPayloadID(std::get<CommandTuple::Payload>(*it));
newPayloadID = DramExtension::getChannelPayloadID(*std::get<CommandTuple::Payload>(*it));
if (newTimestamp < lastTimestamp)
{
@@ -108,7 +108,7 @@ CommandTuple::Type CmdMuxOldestRasCas::selectCommand(const ReadyCommands &readyC
{
newTimestamp = std::get<CommandTuple::Timestamp>(*it) +
memSpec.getCommandLength(std::get<CommandTuple::Command>(*it));
newPayloadID = DramExtension::getChannelPayloadID(std::get<CommandTuple::Payload>(*it));
newPayloadID = DramExtension::getChannelPayloadID(*std::get<CommandTuple::Payload>(*it));
if (newTimestamp < lastTimestamp)
{
@@ -130,7 +130,7 @@ CommandTuple::Type CmdMuxOldestRasCas::selectCommand(const ReadyCommands &readyC
{
newTimestamp = std::get<CommandTuple::Timestamp>(*it) +
memSpec.getCommandLength(std::get<CommandTuple::Command>(*it));
newPayloadID = DramExtension::getChannelPayloadID(std::get<CommandTuple::Payload>(*it));
newPayloadID = DramExtension::getChannelPayloadID(*std::get<CommandTuple::Payload>(*it));
if (newTimestamp < lastTimestamp)
{
@@ -158,7 +158,7 @@ CommandTuple::Type CmdMuxOldestRasCas::selectCommand(const ReadyCommands &readyC
for (auto it = readyRasCasCommands.cbegin(); it != readyRasCasCommands.cend(); it++)
{
newTimestamp = std::get<CommandTuple::Timestamp>(*it);
newPayloadID = DramExtension::getChannelPayloadID(std::get<CommandTuple::Payload>(*it));
newPayloadID = DramExtension::getChannelPayloadID(*std::get<CommandTuple::Payload>(*it));
if (newTimestamp < lastTimestamp)
{

8
DRAMSys/library/src/controller/cmdmux/CmdMuxStrict.cpp
View File

@@ -52,7 +52,7 @@ CommandTuple::Type CmdMuxStrict::selectCommand(const ReadyCommands &readyCommand
{
newTimestamp = std::get<CommandTuple::Timestamp>(*it) +
memSpec.getCommandLength(std::get<CommandTuple::Command>(*it));
newPayloadID = DramExtension::getChannelPayloadID(std::get<CommandTuple::Payload>(*it));
newPayloadID = DramExtension::getChannelPayloadID(*std::get<CommandTuple::Payload>(*it));
if (newTimestamp < lastTimestamp)
{
@@ -118,7 +118,7 @@ CommandTuple::Type CmdMuxStrictRasCas::selectCommand(const ReadyCommands &readyC
{
newTimestamp = std::get<CommandTuple::Timestamp>(*it) +
memSpec.getCommandLength(std::get<CommandTuple::Command>(*it));
newPayloadID = DramExtension::getChannelPayloadID(std::get<CommandTuple::Payload>(*it));
newPayloadID = DramExtension::getChannelPayloadID(*std::get<CommandTuple::Payload>(*it));
if (newTimestamp < lastTimestamp)
{
@@ -135,7 +135,7 @@ CommandTuple::Type CmdMuxStrictRasCas::selectCommand(const ReadyCommands &readyC
for (auto it = readyCasCommands.cbegin(); it != readyCasCommands.cend(); it++)
{
newPayloadID = DramExtension::getChannelPayloadID(std::get<CommandTuple::Payload>(*it));
newPayloadID = DramExtension::getChannelPayloadID(*std::get<CommandTuple::Payload>(*it));
if (newPayloadID == nextPayloadID)
{
@@ -157,7 +157,7 @@ CommandTuple::Type CmdMuxStrictRasCas::selectCommand(const ReadyCommands &readyC
for (auto it = readyRasCasCommands.cbegin(); it != readyRasCasCommands.cend(); it++)
{
newTimestamp = std::get<CommandTuple::Timestamp>(*it);
newPayloadID = DramExtension::getChannelPayloadID(std::get<CommandTuple::Payload>(*it));
newPayloadID = DramExtension::getChannelPayloadID(*std::get<CommandTuple::Payload>(*it));
if (newTimestamp < lastTimestamp)
{

2
DRAMSys/library/src/controller/respqueue/RespQueueReorder.cpp
View File

@@ -40,7 +40,7 @@ using namespace tlm;
void RespQueueReorder::insertPayload(tlm_generic_payload *payload, sc_time strobeEnd)
{
buffer[DramExtension::getChannelPayloadID(payload)] = {payload, strobeEnd};
buffer[DramExtension::getChannelPayloadID(*payload)] = {payload, strobeEnd};
}
tlm_generic_payload *RespQueueReorder::nextPayload()

2
DRAMSys/library/src/controller/scheduler/SchedulerFifo.cpp
View File

@@ -82,7 +82,7 @@ bool SchedulerFifo::hasFurtherRowHit(Bank bank, Row row, tlm_command command) co
{
if (buffer[bank.ID()].size() >= 2)
{
tlm_generic_payload *nextRequest = buffer[bank.ID()][1];
tlm_generic_payload& nextRequest = *buffer[bank.ID()][1];
if (DramExtension::getRow(nextRequest) == row)
return true;
}

4
DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.cpp
View File

@@ -88,7 +88,7 @@ tlm_generic_payload *SchedulerFrFcfs::getNextRequest(const BankMachine& bankMach
Row openRow = bankMachine.getOpenRow();
for (auto it : buffer[bankID])
{
if (DramExtension::getRow(it) == openRow)
if (DramExtension::getRow(*it) == openRow)
return it;
}
}
@@ -103,7 +103,7 @@ bool SchedulerFrFcfs::hasFurtherRowHit(Bank bank, Row row, tlm_command command)
unsigned rowHitCounter = 0;
for (auto it : buffer[bank.ID()])
{
if (DramExtension::getRow(it) == row)
if (DramExtension::getRow(*it) == row)
{
rowHitCounter++;
if (rowHitCounter == 2)

4
DRAMSys/library/src/controller/scheduler/SchedulerFrFcfsGrp.cpp
View File

@@ -90,7 +90,7 @@ tlm_generic_payload *SchedulerFrFcfsGrp::getNextRequest(const BankMachine& bankM
std::list<tlm_generic_payload *> rowHits;
for (auto it : buffer[bankID])
{
if (DramExtension::getRow(it) == openRow)
if (DramExtension::getRow(*it) == openRow)
rowHits.push_back(it);
}
@@ -128,7 +128,7 @@ bool SchedulerFrFcfsGrp::hasFurtherRowHit(Bank bank, Row row, tlm_command comman
unsigned rowHitCounter = 0;
for (auto it : buffer[bank.ID()])
{
if (DramExtension::getRow(it) == row)
if (DramExtension::getRow(*it) == row)
{
rowHitCounter++;
if (rowHitCounter == 2)

12
DRAMSys/library/src/controller/scheduler/SchedulerGrpFrFcfs.cpp
View File

@@ -97,7 +97,7 @@ tlm_generic_payload *SchedulerGrpFrFcfs::getNextRequest(const BankMachine& bankM
Row openRow = bankMachine.getOpenRow();
for (auto it : readBuffer[bankID])
{
if (DramExtension::getRow(it) == openRow)
if (DramExtension::getRow(*it) == openRow)
return it;
}
}
@@ -112,7 +112,7 @@ tlm_generic_payload *SchedulerGrpFrFcfs::getNextRequest(const BankMachine& bankM
Row openRow = bankMachine.getOpenRow();
for (auto it : writeBuffer[bankID])
{
if (DramExtension::getRow(it) == openRow)
if (DramExtension::getRow(*it) == openRow)
return it;
}
}
@@ -132,7 +132,7 @@ tlm_generic_payload *SchedulerGrpFrFcfs::getNextRequest(const BankMachine& bankM
Row openRow = bankMachine.getOpenRow();
for (auto it : writeBuffer[bankID])
{
if (DramExtension::getRow(it) == openRow)
if (DramExtension::getRow(*it) == openRow)
return it;
}
}
@@ -147,7 +147,7 @@ tlm_generic_payload *SchedulerGrpFrFcfs::getNextRequest(const BankMachine& bankM
Row openRow = bankMachine.getOpenRow();
for (auto it : readBuffer[bankID])
{
if (DramExtension::getRow(it) == openRow)
if (DramExtension::getRow(*it) == openRow)
return it;
}
}
@@ -167,7 +167,7 @@ bool SchedulerGrpFrFcfs::hasFurtherRowHit(Bank bank, Row row, tlm_command comman
{
for (auto it : readBuffer[bank.ID()])
{
if (DramExtension::getRow(it) == row)
if (DramExtension::getRow(*it) == row)
{
rowHitCounter++;
if (rowHitCounter == 2)
@@ -180,7 +180,7 @@ bool SchedulerGrpFrFcfs::hasFurtherRowHit(Bank bank, Row row, tlm_command comman
{
for (auto it : writeBuffer[bank.ID()])
{
if (DramExtension::getRow(it) == row)
if (DramExtension::getRow(*it) == row)
{
rowHitCounter++;
if (rowHitCounter == 2)

8
DRAMSys/library/src/controller/scheduler/SchedulerGrpFrFcfsWm.cpp
View File

@@ -101,7 +101,7 @@ tlm_generic_payload *SchedulerGrpFrFcfsWm::getNextRequest(const BankMachine& ban
Row openRow = bankMachine.getOpenRow();
for (auto it : readBuffer[bankID])
{
if (DramExtension::getRow(it) == openRow)
if (DramExtension::getRow(*it) == openRow)
return it;
}
}
@@ -121,7 +121,7 @@ tlm_generic_payload *SchedulerGrpFrFcfsWm::getNextRequest(const BankMachine& ban
Row openRow = bankMachine.getOpenRow();
for (auto it : writeBuffer[bankID])
{
if (DramExtension::getRow(it) == openRow)
if (DramExtension::getRow(*it) == openRow)
return it;
}
}
@@ -140,7 +140,7 @@ bool SchedulerGrpFrFcfsWm::hasFurtherRowHit(Bank bank, Row row, tlm::tlm_command
{
for (const auto* it : readBuffer[bank.ID()])
{
if (DramExtension::getRow(it) == row)
if (DramExtension::getRow(*it) == row)
{
rowHitCounter++;
if (rowHitCounter == 2)
@@ -153,7 +153,7 @@ bool SchedulerGrpFrFcfsWm::hasFurtherRowHit(Bank bank, Row row, tlm::tlm_command
{
for (auto it : writeBuffer[bank.ID()])
{
if (DramExtension::getRow(it) == row)
if (DramExtension::getRow(*it) == row)
{
rowHitCounter++;
if (rowHitCounter == 2)

28
DRAMSys/library/src/simulation/AddressDecoder.cpp
View File

@@ -116,7 +116,7 @@ AddressDecoder::AddressDecoder(const Configuration& config, const DRAMSysConfigu
SC_REPORT_FATAL("AddressDecoder", "Memspec and address mapping do not match");
}
DecodedAddress AddressDecoder::decodeAddress(uint64_t encAddr)
DecodedAddress AddressDecoder::decodeAddress(uint64_t encAddr) const
{
if (encAddr > maximumAddress)
SC_REPORT_WARNING("AddressDecoder", ("Address " + std::to_string(encAddr) + " out of range (maximum address is " + std::to_string(maximumAddress) + ")").c_str());
@@ -161,7 +161,31 @@ DecodedAddress AddressDecoder::decodeAddress(uint64_t encAddr)
return decAddr;
}
void AddressDecoder::print()
unsigned AddressDecoder::decodeChannel(uint64_t encAddr) const
{
if (encAddr > maximumAddress)
SC_REPORT_WARNING("AddressDecoder", ("Address " + std::to_string(encAddr) + " out of range (maximum address is " + std::to_string(maximumAddress) + ")").c_str());
// Apply XOR
// For each used xor:
// Get the first bit and second bit. Apply a bitwise xor operator and save it back to the first bit.
for (auto &it : vXor)
{
uint64_t xoredBit;
xoredBit = (((encAddr >> it.first) & UINT64_C(1)) ^ ((encAddr >> it.second) & UINT64_C(1)));
encAddr &= ~(UINT64_C(1) << it.first);
encAddr |= xoredBit << it.first;
}
unsigned channel = 0;
for (unsigned it = 0; it < vChannelBits.size(); it++)
channel |= ((encAddr >> vChannelBits[it]) & UINT64_C(1)) << it;
return channel;
}
void AddressDecoder::print() const
{
std::cout << headline << std::endl;
std::cout << "Used Address Mapping:" << std::endl;

5
DRAMSys/library/src/simulation/AddressDecoder.h
View File

@@ -68,8 +68,9 @@ class AddressDecoder
{
public:
AddressDecoder(const Configuration& config, const DRAMSysConfiguration::AddressMapping &addressMapping);
DecodedAddress decodeAddress(uint64_t addr);
void print();
DecodedAddress decodeAddress(uint64_t encAddr) const;
unsigned decodeChannel(uint64_t encAddr) const;
void print() const;
private:
unsigned banksPerGroup;

18
DRAMSys/library/src/simulation/Arbiter.cpp
View File

@@ -47,8 +47,8 @@ using namespace sc_core;
using namespace tlm;
Arbiter::Arbiter(const sc_module_name &name, const Configuration& config,
const DRAMSysConfiguration::AddressMapping& addressMapping) :
sc_module(name), addressDecoder(config, addressMapping), payloadEventQueue(this, &Arbiter::peqCallback),
const AddressDecoder& addressDecoder) :
sc_module(name), addressDecoder(addressDecoder), payloadEventQueue(this, &Arbiter::peqCallback),
tCK(config.memSpec->tCK),
arbitrationDelayFw(config.arbitrationDelayFw),
arbitrationDelayBw(config.arbitrationDelayBw),
@@ -58,22 +58,20 @@ Arbiter::Arbiter(const sc_module_name &name, const Configuration& config,
iSocket.register_nb_transport_bw(this, &Arbiter::nb_transport_bw);
tSocket.register_nb_transport_fw(this, &Arbiter::nb_transport_fw);
tSocket.register_transport_dbg(this, &Arbiter::transport_dbg);
addressDecoder.print();
}
ArbiterSimple::ArbiterSimple(const sc_module_name& name, const Configuration& config,
const DRAMSysConfiguration::AddressMapping &addressMapping) :
Arbiter(name, config, addressMapping) {}
const AddressDecoder& addressDecoder) :
Arbiter(name, config, addressDecoder) {}
ArbiterFifo::ArbiterFifo(const sc_module_name &name, const Configuration& config,
const DRAMSysConfiguration::AddressMapping &addressMapping) :
Arbiter(name, config, addressMapping),
const AddressDecoder& addressDecoder) :
Arbiter(name, config, addressDecoder),
maxActiveTransactions(config.maxActiveTransactions) {}
ArbiterReorder::ArbiterReorder(const sc_module_name &name, const Configuration& config,
const DRAMSysConfiguration::AddressMapping &addressMapping) :
Arbiter(name, config, addressMapping),
const AddressDecoder& addressDecoder) :
Arbiter(name, config, addressDecoder),
maxActiveTransactions(config.maxActiveTransactions) {}
void Arbiter::end_of_elaboration()

12
DRAMSys/library/src/simulation/Arbiter.h
View File

@@ -64,12 +64,12 @@ public:
protected:
Arbiter(const sc_core::sc_module_name &name, const Configuration& config,
const DRAMSysConfiguration::AddressMapping &addressMapping);
const AddressDecoder& addressDecoder);
SC_HAS_PROCESS(Arbiter);
void end_of_elaboration() override;
AddressDecoder addressDecoder;
const AddressDecoder& addressDecoder;
tlm_utils::peq_with_cb_and_phase<Arbiter> payloadEventQueue;
virtual void peqCallback(tlm::tlm_generic_payload &payload, const tlm::tlm_phase &phase) = 0;
@@ -100,7 +100,7 @@ class ArbiterSimple final : public Arbiter
{
public:
ArbiterSimple(const sc_core::sc_module_name &name, const Configuration& config,
const DRAMSysConfiguration::AddressMapping &addressMapping);
const AddressDecoder& addressDecoder);
SC_HAS_PROCESS(ArbiterSimple);
private:
@@ -114,7 +114,7 @@ class ArbiterFifo final : public Arbiter
{
public:
ArbiterFifo(const sc_core::sc_module_name &name, const Configuration& config,
const DRAMSysConfiguration::AddressMapping &addressMapping);
const AddressDecoder& addressDecoder);
SC_HAS_PROCESS(ArbiterFifo);
private:
@@ -135,7 +135,7 @@ class ArbiterReorder final : public Arbiter
{
public:
ArbiterReorder(const sc_core::sc_module_name &name, const Configuration& config,
const DRAMSysConfiguration::AddressMapping &addressMapping);
const AddressDecoder& addressDecoder);
SC_HAS_PROCESS(ArbiterReorder);
private:
@@ -149,7 +149,7 @@ private:
{
bool operator() (const tlm::tlm_generic_payload *lhs, const tlm::tlm_generic_payload *rhs) const
{
return DramExtension::getThreadPayloadID(lhs) < DramExtension::getThreadPayloadID(rhs);
return DramExtension::getThreadPayloadID(*lhs) < DramExtension::getThreadPayloadID(*rhs);
}
};

14
DRAMSys/library/src/simulation/DRAMSys.cpp
View File

@@ -149,23 +149,27 @@ void DRAMSys::setupDebugManager(NDEBUG_UNUSED(const std::string &traceName))
#endif
}
void DRAMSys::instantiateModules(const DRAMSysConfiguration::AddressMapping &addressMapping)
void DRAMSys::instantiateModules(const DRAMSysConfiguration::AddressMapping& addressMapping)
{
temperatureController = std::make_unique<TemperatureController>("TemperatureController", config);
addressDecoder = std::make_unique<AddressDecoder>(config, addressMapping);
addressDecoder->print();
// Create arbiter
if (config.arbiter == Configuration::Arbiter::Simple)
arbiter = std::make_unique<ArbiterSimple>("arbiter", config, addressMapping);
arbiter = std::make_unique<ArbiterSimple>("arbiter", config, *addressDecoder);
else if (config.arbiter == Configuration::Arbiter::Fifo)
arbiter = std::make_unique<ArbiterFifo>("arbiter", config, addressMapping);
arbiter = std::make_unique<ArbiterFifo>("arbiter", config, *addressDecoder);
else if (config.arbiter == Configuration::Arbiter::Reorder)
arbiter = std::make_unique<ArbiterReorder>("arbiter", config, addressMapping);
arbiter = std::make_unique<ArbiterReorder>("arbiter", config, *addressDecoder);
// Create controllers and DRAMs
MemSpec::MemoryType memoryType = config.memSpec->memoryType;
for (std::size_t i = 0; i < config.memSpec->numberOfChannels; i++)
{
controllers.emplace_back(std::make_unique<Controller>(("controller" + std::to_string(i)).c_str(), config));
controllers.emplace_back(std::make_unique<Controller>(("controller" + std::to_string(i)).c_str(), config,
*addressDecoder));
if (memoryType == MemSpec::MemoryType::DDR3)
drams.emplace_back(std::make_unique<DramDDR3>(("dram" + std::to_string(i)).c_str(), config,

3
DRAMSys/library/src/simulation/DRAMSys.h
View File

@@ -48,6 +48,7 @@
#include "../error/eccbaseclass.h"
#include "../controller/ControllerIF.h"
#include "TemperatureController.h"
#include "AddressDecoder.h"
#include <Configuration.h>
#include <string>
@@ -94,6 +95,8 @@ protected:
// DRAM units
std::vector<std::unique_ptr<Dram>> drams;
std::unique_ptr<AddressDecoder> addressDecoder;
void report(const std::string &message);
void bindSockets();

8
DRAMSys/library/src/simulation/DRAMSysRecordable.cpp
View File

@@ -116,18 +116,18 @@ void DRAMSysRecordable::instantiateModules(const std::string &traceName,
// Create arbiter
if (config.arbiter == Configuration::Arbiter::Simple)
arbiter = std::make_unique<ArbiterSimple>("arbiter", config, configLib.addressMapping);
arbiter = std::make_unique<ArbiterSimple>("arbiter", config, *addressDecoder);
else if (config.arbiter == Configuration::Arbiter::Fifo)
arbiter = std::make_unique<ArbiterFifo>("arbiter", config, configLib.addressMapping);
arbiter = std::make_unique<ArbiterFifo>("arbiter", config, *addressDecoder);
else if (config.arbiter == Configuration::Arbiter::Reorder)
arbiter = std::make_unique<ArbiterReorder>("arbiter", config, configLib.addressMapping);
arbiter = std::make_unique<ArbiterReorder>("arbiter", config, *addressDecoder);
// Create controllers and DRAMs
MemSpec::MemoryType memoryType = config.memSpec->memoryType;
for (std::size_t i = 0; i < config.memSpec->numberOfChannels; i++)
{
controllers.emplace_back(std::make_unique<ControllerRecordable>(("controller" + std::to_string(i)).c_str(),
config, tlmRecorders[i]));
config, *addressDecoder, tlmRecorders[i]));
if (memoryType == MemSpec::MemoryType::DDR3)
drams.emplace_back(std::make_unique<DramRecordable<DramDDR3>>(("dram" + std::to_string(i)).c_str(),