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Remove unused files, make includes consistent.

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This commit is contained in:
Lukas Steiner
2023-02-22 10:53:20 +01:00
parent 3bc1a6afde
commit b13cf5845c
35 changed files with 74 additions and 1037 deletions
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31
src/configuration/CMakeLists.txt
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@@ -38,35 +38,8 @@
project(DRAMSys_Configuration)
#file(GLOB_RECURSE SOURCE_FILES CONFIGURE_DEPENDS *.cpp)
#file(GLOB_RECURSE HEADER_FILES CONFIGURE_DEPENDS *.h;*.hpp)
set(SOURCE_FILES
DRAMSys/config/AddressMapping.cpp
DRAMSys/config/AddressMapping.h
DRAMSys/config/DRAMSysConfiguration.cpp
DRAMSys/config/DRAMSysConfiguration.h
DRAMSys/config/McConfig.cpp
DRAMSys/config/McConfig.h
DRAMSys/config/memspec/MemArchitectureSpec.cpp
DRAMSys/config/memspec/MemArchitectureSpec.h
DRAMSys/config/memspec/MemPowerSpec.cpp
DRAMSys/config/memspec/MemPowerSpec.h
DRAMSys/config/memspec/MemSpec.cpp
DRAMSys/config/memspec/MemSpec.h
DRAMSys/config/memspec/MemTimingSpec.cpp
DRAMSys/config/memspec/MemTimingSpec.h
DRAMSys/config/SimConfig.cpp
DRAMSys/config/SimConfig.h
DRAMSys/config/ThermalConfig.cpp
DRAMSys/config/ThermalConfig.h
DRAMSys/config/TraceSetup.cpp
DRAMSys/config/TraceSetup.h
DRAMSys/config/ConfigUtil.cpp
DRAMSys/config/ConfigUtil.h
"${DRAMSYS_TESTS_DIR}/tests_configuration/CMakeLists.txt"
)
file(GLOB_RECURSE SOURCE_FILES CONFIGURE_DEPENDS *.cpp)
file(GLOB_RECURSE HEADER_FILES CONFIGURE_DEPENDS *.h;*.hpp)
add_library(${PROJECT_NAME} STATIC ${SOURCE_FILES} ${HEADER_FILES})

6
src/configuration/DRAMSys/config/DRAMSysConfiguration.cpp
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@@ -47,8 +47,7 @@ std::string Configuration::resourceDirectory;
void to_json(json_t &j, const Configuration &c)
{
j = json_t{{"addressmapping", c.addressMapping}, {"mcconfig", c.mcConfig}, {"memspec", c.memSpec},
{"simulationid", c.simulationId}, {"simconfig", c.simConfig}, {"thermalconfig", c.thermalConfig},
{"tracesetup", c.traceSetup}};
{"simulationid", c.simulationId}, {"simconfig", c.simConfig}, {"tracesetup", c.traceSetup}};
remove_null_values(j);
}
@@ -61,9 +60,6 @@ void from_json(const json_t &j, Configuration &c)
j.at("simulationid").get_to(c.simulationId);
j.at("simconfig").get_to(c.simConfig);
if (j.contains("thermalconfig"))
j.at("thermalconfig").get_to(c.thermalConfig);
if (j.contains("tracesetup"))
j.at("tracesetup").get_to(c.traceSetup);
}

1
src/configuration/DRAMSys/config/DRAMSysConfiguration.h
View File

@@ -39,7 +39,6 @@
#include "DRAMSys/config/AddressMapping.h"
#include "DRAMSys/config/McConfig.h"
#include "DRAMSys/config/SimConfig.h"
#include "DRAMSys/config/ThermalConfig.h"
#include "DRAMSys/config/TraceSetup.h"
#include "DRAMSys/config/memspec/MemSpec.h"
#include "DRAMSys/config/ConfigUtil.h"

121
src/configuration/DRAMSys/config/ThermalConfig.cpp
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@@ -1,121 +0,0 @@
/*
* Copyright (c) 2021, Technische Universität Kaiserslautern
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
* OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors:
* Derek Christ
*/
#include "ThermalConfig.h"
namespace DRAMSys::Config
{
void to_json(json_t &j, const ThermalConfig &c)
{
j = json_t{{"TemperatureScale", c.temperatureScale},
{"StaticTemperatureDefaultValue", c.staticTemperatureDefaultValue},
{"ThermalSimPeriod", c.thermalSimPeriod},
{"ThermalSimUnit", c.thermalSimUnit},
{"PowerInfoFile", c.powerInfo},
{"IceServerIp", c.iceServerIp},
{"IceServerPort", c.iceServerPort},
{"SimPeriodAdjustFactor", c.simPeriodAdjustFactor},
{"NPowStableCyclesToIncreasePeriod", c.nPowStableCyclesToIncreasePeriod},
{"GenerateTemperatureMap", c.generateTemperatureMap},
{"GeneratePowerMap", c.generatePowerMap}};
}
void from_json(const json_t &j, ThermalConfig &c)
{
json_t j_thermalsim = get_config_json(j, thermalConfigPath, "thermalsimconfig");
j_thermalsim.at("TemperatureScale").get_to(c.temperatureScale);
j_thermalsim.at("StaticTemperatureDefaultValue").get_to(c.staticTemperatureDefaultValue);
j_thermalsim.at("ThermalSimPeriod").get_to(c.thermalSimPeriod);
j_thermalsim.at("ThermalSimUnit").get_to(c.thermalSimUnit);
j_thermalsim.at("PowerInfoFile").get_to(c.powerInfo);
j_thermalsim.at("IceServerIp").get_to(c.iceServerIp);
j_thermalsim.at("IceServerPort").get_to(c.iceServerPort);
j_thermalsim.at("SimPeriodAdjustFactor").get_to(c.simPeriodAdjustFactor);
j_thermalsim.at("NPowStableCyclesToIncreasePeriod").get_to(c.nPowStableCyclesToIncreasePeriod);
j_thermalsim.at("GenerateTemperatureMap").get_to(c.generateTemperatureMap);
j_thermalsim.at("GeneratePowerMap").get_to(c.generatePowerMap);
}
void to_json(json_t &j, const DramDieChannel &c)
{
j = json_t{{"init_pow", c.init_pow}, {"threshold", c.threshold}};
}
void from_json(const json_t &j, DramDieChannel &c)
{
j.at("init_pow").get_to(c.init_pow);
j.at("threshold").get_to(c.threshold);
}
void to_json(json_t &j, const PowerInfo &c)
{
j = json_t{};
for (const auto &channel : c.channels)
{
j.emplace(channel.identifier, channel);
}
}
void from_json(const json_t &j, PowerInfo &c)
{
json_t j_powerinfo = get_config_json(j, thermalConfigPath, "powerInfo");
for (const auto &entry : j_powerinfo.items())
{
DramDieChannel channel;
j_powerinfo.at(entry.key()).get_to(channel);
channel.identifier = entry.key();
c.channels.push_back(channel);
}
}
void from_dump(const std::string &dump, ThermalConfig &c)
{
json_t json_thermalconfig = json_t::parse(dump).at("thermalconfig");
json_thermalconfig.get_to(c);
}
std::string dump(const ThermalConfig &c, unsigned int indentation)
{
json_t json_thermalconfig;
json_thermalconfig["thermalconfig"] = c;
return json_thermalconfig.dump(indentation);
}
} // namespace DRAMSys::Config

118
src/configuration/DRAMSys/config/ThermalConfig.h
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@@ -1,118 +0,0 @@
/*
* Copyright (c) 2021, Technische Universität Kaiserslautern
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
* OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors:
* Derek Christ
*/
#ifndef DRAMSYSCONFIGURATION_THERMALCONFIG_H
#define DRAMSYSCONFIGURATION_THERMALCONFIG_H
#include "DRAMSys/config/ConfigUtil.h"
namespace DRAMSys::Config
{
const std::string thermalConfigPath = "configs/thermalsim";
enum class TemperatureScale
{
Celsius,
Fahrenheit,
Kelvin,
Invalid = -1,
};
NLOHMANN_JSON_SERIALIZE_ENUM(TemperatureScale, {{TemperatureScale::Invalid, nullptr},
{TemperatureScale::Celsius, "Celsius"},
{TemperatureScale::Fahrenheit, "Fahrenheit"},
{TemperatureScale::Kelvin, "Kelvin"}})
enum class ThermalSimUnit
{
Seconds,
Milliseconds,
Microseconds,
Nanoseconds,
Picoseconds,
Femtoseconds,
Invalid = -1,
};
NLOHMANN_JSON_SERIALIZE_ENUM(ThermalSimUnit, {{ThermalSimUnit::Invalid, nullptr},
{ThermalSimUnit::Seconds, "s"},
{ThermalSimUnit::Milliseconds, "ms"},
{ThermalSimUnit::Microseconds, "us"},
{ThermalSimUnit::Nanoseconds, "ns"},
{ThermalSimUnit::Picoseconds, "ps"},
{ThermalSimUnit::Femtoseconds, "fs"}})
struct DramDieChannel
{
std::string identifier;
double init_pow;
double threshold;
};
void to_json(json_t &j, const DramDieChannel &c);
void from_json(const json_t &j, DramDieChannel &c);
struct PowerInfo
{
std::vector<DramDieChannel> channels;
};
void to_json(json_t &j, const PowerInfo &c);
void from_json(const json_t &j, PowerInfo &c);
struct ThermalConfig
{
TemperatureScale temperatureScale;
int staticTemperatureDefaultValue;
double thermalSimPeriod;
ThermalSimUnit thermalSimUnit;
PowerInfo powerInfo;
std::string iceServerIp;
unsigned int iceServerPort;
unsigned int simPeriodAdjustFactor;
unsigned int nPowStableCyclesToIncreasePeriod;
bool generateTemperatureMap;
bool generatePowerMap;
};
void to_json(json_t &j, const ThermalConfig &c);
void from_json(const json_t &j, ThermalConfig &c);
void from_dump(const std::string &dump, ThermalConfig &c);
std::string dump(const ThermalConfig &c, unsigned int indentation = -1);
} // namespace Configuration
#endif // DRAMSYSCONFIGURATION_THERMALCONFIG_H

6
src/libdramsys/DRAMSys/common/TlmRecorder.cpp
View File

@@ -426,13 +426,13 @@ void TlmRecorder::insertGeneralInfo()
void TlmRecorder::insertCommandLengths()
{
const MemSpec& memSpec = *config.memSpec;
const MemSpec& _memSpec = *config.memSpec;
auto insertCommandLength = [this, &memSpec](Command command) {
auto insertCommandLength = [this, &_memSpec](Command command) {
auto commandName = command.toString();
sqlite3_bind_text(insertCommandLengthsStatement, 1, commandName.c_str(), commandName.length(), nullptr);
sqlite3_bind_double(insertCommandLengthsStatement, 2, memSpec.getCommandLengthInCycles(command));
sqlite3_bind_double(insertCommandLengthsStatement, 2, _memSpec.getCommandLengthInCycles(command));
executeSqlStatement(insertCommandLengthsStatement);
};

4
src/libdramsys/DRAMSys/controller/Command.h
View File

@@ -126,8 +126,8 @@ private:
public:
Command() = default;
explicit Command(Type type);
explicit Command(tlm::tlm_phase phase);
Command(Type type);
Command(tlm::tlm_phase phase);
[[nodiscard]] std::string toString() const;
[[nodiscard]] tlm::tlm_phase toPhase() const;

1
src/libdramsys/DRAMSys/controller/ControllerIF.h
View File

@@ -38,6 +38,7 @@
#define CONTROLLERIF_H
#include "DRAMSys/configuration/Configuration.h"
#include "DRAMSys/common/DebugManager.h"
#include <iomanip>
#include <systemc>

2
src/libdramsys/DRAMSys/controller/checker/CheckerDDR3.cpp
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@@ -34,6 +34,8 @@
#include "CheckerDDR3.h"
#include "DRAMSys/common/DebugManager.h"
#include <algorithm>
using namespace sc_core;

2
src/libdramsys/DRAMSys/controller/checker/CheckerDDR4.cpp
View File

@@ -34,6 +34,8 @@
#include "CheckerDDR4.h"
#include "DRAMSys/common/DebugManager.h"
#include <algorithm>
using namespace sc_core;

2
src/libdramsys/DRAMSys/controller/checker/CheckerGDDR5.cpp
View File

@@ -34,6 +34,8 @@
#include "CheckerGDDR5.h"
#include "DRAMSys/common/DebugManager.h"
#include <algorithm>
using namespace sc_core;

2
src/libdramsys/DRAMSys/controller/checker/CheckerGDDR5X.cpp
View File

@@ -34,6 +34,8 @@
#include "CheckerGDDR5X.h"
#include "DRAMSys/common/DebugManager.h"
#include <algorithm>
using namespace sc_core;

2
src/libdramsys/DRAMSys/controller/checker/CheckerGDDR6.cpp
View File

@@ -34,6 +34,8 @@
#include "CheckerGDDR6.h"
#include "DRAMSys/common/DebugManager.h"
#include <algorithm>
using namespace sc_core;

2
src/libdramsys/DRAMSys/controller/checker/CheckerHBM2.cpp
View File

@@ -34,6 +34,8 @@
#include "CheckerHBM2.h"
#include "DRAMSys/common/DebugManager.h"
#include <algorithm>
using namespace sc_core;

2
src/libdramsys/DRAMSys/controller/checker/CheckerLPDDR4.cpp
View File

@@ -34,6 +34,8 @@
#include "CheckerLPDDR4.h"
#include "DRAMSys/common/DebugManager.h"
#include <algorithm>
using namespace sc_core;

2
src/libdramsys/DRAMSys/controller/checker/CheckerSTTMRAM.cpp
View File

@@ -34,6 +34,8 @@
#include "CheckerSTTMRAM.h"
#include "DRAMSys/common/DebugManager.h"
#include <algorithm>
using namespace sc_core;

2
src/libdramsys/DRAMSys/controller/checker/CheckerWideIO.cpp
View File

@@ -34,6 +34,8 @@
#include "CheckerWideIO.h"
#include "DRAMSys/common/DebugManager.h"
#include <algorithm>
using namespace sc_core;

2
src/libdramsys/DRAMSys/controller/checker/CheckerWideIO2.cpp
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@@ -34,6 +34,8 @@
#include "CheckerWideIO2.h"
#include "DRAMSys/common/DebugManager.h"
#include <algorithm>
using namespace sc_core;

1
src/libdramsys/DRAMSys/simulation/Arbiter.cpp
View File

@@ -41,6 +41,7 @@
#include "DRAMSys/simulation/AddressDecoder.h"
#include "DRAMSys/configuration/Configuration.h"
#include "DRAMSys/common/DebugManager.h"
#include "DRAMSys/config/DRAMSysConfiguration.h"

2
src/simulator/CMakeLists.txt
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@@ -43,7 +43,7 @@ project(DRAMSys_Simulator)
file(GLOB_RECURSE SOURCE_FILES CONFIGURE_DEPENDS *.cpp)
file(GLOB_RECURSE HEADER_FILES CONFIGURE_DEPENDS *.h;*.hpp)
add_executable(DRAMSys ${SOURCE_FILES} ${HEADER_FILES} )
add_executable(DRAMSys ${SOURCE_FILES} ${HEADER_FILES})
target_include_directories(DRAMSys PRIVATE ${CMAKE_CURRENT_SOURCE_DIR})
if(EXISTS ${CMAKE_CURRENT_LIST_DIR}/../library/src/simulation/DRAMSysRecordable.cpp)

238
src/simulator/simulator/ExampleInitiator.h
View File

@@ -1,238 +0,0 @@
/*
* Copyright (c) 2016, Technische Universität Kaiserslautern
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
* OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors:
* Eder F. Zulian
*/
#ifndef EXAMPLEINITIATOR_H
#define EXAMPLEINITIATOR_H
#include <cstdlib>
#include <iostream>
#include <systemc>
#include "MemoryManager.h"
#include "common/dramExtensions.h"
#include "TracePlayer.h"
struct ExampleInitiator : sc_core::sc_module
{
// TLM-2 socket, defaults to 32-bits wide, base protocol
tlm_utils::simple_initiator_socket<ExampleInitiator> socket;
SC_CTOR(ExampleInitiator)
: socket("socket"),
request_in_progress(nullptr),
m_peq(this, &ExampleInitiator::peq_cb)
{
socket.register_nb_transport_bw(this, &ExampleInitiator::nb_transport_bw);
SC_THREAD(thread_process);
}
void thread_process()
{
tlm::tlm_generic_payload *trans;
tlm::tlm_phase phase;
sc_core::sc_time delay;
dump_mem();
init_mem();
dump_mem();
for (unsigned char &i : data)
i = 0x55;
// Generate 2 write transactions
for (int i = 0; i < 2; i++) {
int adr = i * 64;
tlm::tlm_command cmd = tlm::TLM_WRITE_COMMAND;
// Grab a new transaction from the memory manager
trans = m_mm.allocate();
trans->acquire();
trans->set_command(cmd);
trans->set_address(adr);
trans->set_data_ptr(reinterpret_cast<unsigned char *>(&data[0]));
trans->set_data_length(64);
trans->set_streaming_width(4);
trans->set_byte_enable_ptr(nullptr);
trans->set_dmi_allowed(false);
trans->set_response_status(tlm::TLM_INCOMPLETE_RESPONSE);
// ExampleInitiator must honor BEGIN_REQ/END_REQ exclusion rule
if (request_in_progress)
wait(end_request_event);
request_in_progress = trans;
phase = tlm::BEGIN_REQ;
// Timing annotation models processing time of initiator prior to call
delay = sc_core::sc_time(100000, sc_core::SC_PS);
std::cout << "Address " << std::hex << adr << " new, cmd=" << (cmd ? "write" : "read")
<< ", data=" << std::hex << data[0] << " at time " << sc_core::sc_time_stamp()
<< " in " << name() << std::endl;
GenerationExtension *genExtension = new GenerationExtension(sc_core::sc_time_stamp());
trans->set_auto_extension(genExtension);
// Non-blocking transport call on the forward path
tlm::tlm_sync_enum status;
status = socket->nb_transport_fw( *trans, phase, delay );
// Check value returned from nb_transport_fw
if (status == tlm::TLM_UPDATED) {
// The timing annotation must be honored
m_peq.notify( *trans, phase, delay );
} else if (status == tlm::TLM_COMPLETED) {
// The completion of the transaction necessarily ends the BEGIN_REQ phase
request_in_progress = nullptr;
// The target has terminated the transaction
check_transaction( *trans );
// Allow the memory manager to free the transaction object
trans->release();
}
sc_core::wait(sc_core::sc_time(500, sc_core::SC_NS));
dump_mem();
}
sc_core::wait(sc_core::sc_time(500, sc_core::SC_NS));
sc_core::sc_stop();
}
static void init_mem()
{
unsigned char buffer[64];
for (unsigned char &i : buffer)
i = 0xff;
for (int addr = 0; addr < 128; addr += 64) {
tlm::tlm_generic_payload trans;
trans.set_command( tlm::TLM_WRITE_COMMAND );
trans.set_address( addr );
trans.set_data_ptr( buffer );
trans.set_data_length( 64 );
socket->transport_dbg( trans );
}
}
static void dump_mem()
{
for (int addr = 0; addr < 128; addr += 64) {
unsigned char buffer[64];
tlm::tlm_generic_payload trans;
trans.set_command( tlm::TLM_READ_COMMAND );
trans.set_address( addr );
trans.set_data_ptr( buffer );
trans.set_data_length( 64 );
socket->transport_dbg( trans );
std::cout << "\nMemory dump\n";
for (int i = 0; i < 64; i++)
std::cout << "mem[" << addr + i << "] = " << std::hex << (int)buffer[i] << std::endl;
}
}
// TLM-2 backward non-blocking transport method
virtual tlm::tlm_sync_enum nb_transport_bw( tlm::tlm_generic_payload &trans,
tlm::tlm_phase &phase, sc_core::sc_time &delay )
{
m_peq.notify( trans, phase, delay );
return tlm::TLM_ACCEPTED;
}
// Payload event queue callback to handle transactions from target
// Transaction could have arrived through return path or backward path
void peq_cb(tlm::tlm_generic_payload &trans, const tlm::tlm_phase &phase)
{
if (phase == tlm::END_REQ || (&trans == request_in_progress
&& phase == tlm::BEGIN_RESP)) {
// The end of the BEGIN_REQ phase
request_in_progress = nullptr;
end_request_event.notify();
} else if (phase == tlm::BEGIN_REQ || phase == tlm::END_RESP)
SC_REPORT_FATAL("TLM-2", "Illegal transaction phase received by initiator");
if (phase == tlm::BEGIN_RESP) {
check_transaction( trans );
// Send final phase transition to target
tlm::tlm_phase fw_phase = tlm::END_RESP;
sc_core::sc_time delay = sc_core::sc_time(60000, sc_core::SC_PS);
socket->nb_transport_fw( trans, fw_phase, delay );
// Ignore return value
// Allow the memory manager to free the transaction object
trans.release();
}
}
// Called on receiving BEGIN_RESP or TLM_COMPLETED
void check_transaction(tlm::tlm_generic_payload &trans)
{
if ( trans.is_response_error() ) {
char txt[100];
sprintf(txt, "Transaction returned with error, response status = %s",
trans.get_response_string().c_str());
SC_REPORT_ERROR("TLM-2", txt);
}
tlm::tlm_command cmd = trans.get_command();
uint64_t adr = trans.get_address();
int *ptr = reinterpret_cast<int *>( trans.get_data_ptr() );
std::cout << std::hex << adr << " check, cmd=" << (cmd ? "write" : "read")
<< ", data=" << std::hex << *ptr << " at time " << sc_core::sc_time_stamp()
<< " in " << sc_core::name() << std::endl;
if (cmd == tlm::TLM_READ_COMMAND)
assert( *ptr == -int(adr) );
}
MemoryManager m_mm;
unsigned char data[64];
tlm::tlm_generic_payload *request_in_progress;
sc_core::sc_event end_request_event;
tlm_utils::peq_with_cb_and_phase<ExampleInitiator> m_peq;
};
#endif // EXAMPLEINITIATOR_H

238
src/simulator/simulator/LengthConverter.cpp
View File

@@ -1,238 +0,0 @@
/*
* Copyright (c) 2022, Technische Universität Kaiserslautern
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
* OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors:
* Lukas Steiner
*/
#include "LengthConverter.h"
using namespace sc_core;
using namespace tlm;
// TODO: return status, TLM_INCOMPLETE_RESPONSE, acquire + release
LengthConverter::LengthConverter(const sc_module_name &name, unsigned maxOutputLength, bool storageEnabled) :
sc_module(name), payloadEventQueue(this, &LengthConverter::peqCallback), storageEnabled(storageEnabled),
memoryManager(storageEnabled, maxOutputLength), maxOutputLength(maxOutputLength)
{
iSocket.register_nb_transport_bw(this, &LengthConverter::nb_transport_bw);
tSocket.register_nb_transport_fw(this, &LengthConverter::nb_transport_fw);
tSocket.register_transport_dbg(this, &LengthConverter::transport_dbg);
}
tlm_sync_enum LengthConverter::nb_transport_fw(tlm_generic_payload& trans,
tlm_phase& phase, sc_time& fwDelay)
{
if (phase == BEGIN_REQ)
trans.acquire();
payloadEventQueue.notify(trans, phase, fwDelay);
return TLM_ACCEPTED;
}
tlm_sync_enum LengthConverter::nb_transport_bw(tlm_generic_payload &payload,
tlm_phase &phase, sc_time &bwDelay)
{
payloadEventQueue.notify(payload, phase, bwDelay);
return TLM_ACCEPTED;
}
unsigned int LengthConverter::transport_dbg(tlm_generic_payload &trans)
{
return iSocket->transport_dbg(trans);
}
void LengthConverter::peqCallback(tlm_generic_payload &cbTrans, const tlm_phase &cbPhase)
{
if (cbPhase == BEGIN_REQ) // from initiator
{
if (cbTrans.get_data_length() <= maxOutputLength)
{
// pipe transaction through
tlm_phase fwPhase = BEGIN_REQ;
sc_time fwDelay = SC_ZERO_TIME;
tlm_sync_enum returnStatus = iSocket->nb_transport_fw(cbTrans, fwPhase, fwDelay);
// TODO: END_REQ/BEGIN_RESP shortcut
}
else
{
// split transaction up into multiple sub-transactions
createChildTranses(&cbTrans);
tlm_generic_payload* firstChildTrans = cbTrans.get_extension<ParentExtension>()->getNextChildTrans();
tlm_phase fwPhase = BEGIN_REQ;
sc_time fwDelay = SC_ZERO_TIME;
tlm_sync_enum returnStatus = iSocket->nb_transport_fw(*firstChildTrans, fwPhase, fwDelay);
}
}
else if (cbPhase == END_REQ)
{
if (ChildExtension::isChildTrans(&cbTrans))
{
tlm_generic_payload* nextChildTrans = cbTrans.get_extension<ChildExtension>()->getNextChildTrans();
if (nextChildTrans != nullptr)
{
tlm_phase fwPhase = BEGIN_REQ;
//sc_time fwDelay = SC_ZERO_TIME;
sc_time fwDelay = sc_time(1, SC_NS);
tlm_sync_enum returnStatus = iSocket->nb_transport_fw(*nextChildTrans, fwPhase, fwDelay);
}
else
{
tlm_generic_payload* parentTrans = cbTrans.get_extension<ChildExtension>()->getParentTrans();
tlm_phase bwPhase = END_REQ;
sc_time bwDelay = SC_ZERO_TIME;
tlm_sync_enum returnStatus = tSocket->nb_transport_bw(*parentTrans, bwPhase, bwDelay);
}
}
else
{
tlm_phase bwPhase = END_REQ;
sc_time bwDelay = SC_ZERO_TIME;
tlm_sync_enum returnStatus = tSocket->nb_transport_bw(cbTrans, bwPhase, bwDelay);
}
}
else if (cbPhase == BEGIN_RESP)
{
if (ChildExtension::isChildTrans(&cbTrans))
{
{
tlm_phase fwPhase = END_RESP;
sc_time fwDelay = SC_ZERO_TIME;
tlm_sync_enum returnStatus = iSocket->nb_transport_fw(cbTrans, fwPhase, fwDelay);
}
if (storageEnabled && cbTrans.is_read())
{
tlm_generic_payload* parentTrans = cbTrans.get_extension<ChildExtension>()->getParentTrans();
std::copy(cbTrans.get_data_ptr(), cbTrans.get_data_ptr() + maxOutputLength,
parentTrans->get_data_ptr() + (cbTrans.get_address() - parentTrans->get_address()));
}
if (cbTrans.get_extension<ChildExtension>()->notifyChildTransCompletion()) // all children finished
{
// BEGIN_RESP über tSocket
tlm_generic_payload* parentTrans = cbTrans.get_extension<ChildExtension>()->getParentTrans();
tlm_phase bwPhase = BEGIN_RESP;
sc_time bwDelay = SC_ZERO_TIME;
parentTrans->set_response_status(tlm::TLM_OK_RESPONSE);
tlm_sync_enum returnStatus = tSocket->nb_transport_bw(*parentTrans, bwPhase, bwDelay);
}
}
else
{
tlm_phase bwPhase = BEGIN_RESP;
sc_time bwDelay = SC_ZERO_TIME;
cbTrans.set_response_status(tlm::TLM_OK_RESPONSE);
tlm_sync_enum returnStatus = tSocket->nb_transport_bw(cbTrans, bwPhase, bwDelay);
}
}
else if (cbPhase == END_RESP)
{
if (ParentExtension::isParentTrans(&cbTrans))
{
cbTrans.get_extension<ParentExtension>()->releaseChildTranses();
}
else
{
tlm_phase fwPhase = END_RESP;
sc_time fwDelay = SC_ZERO_TIME;
tlm_sync_enum returnStatus = iSocket->nb_transport_fw(cbTrans, fwPhase, fwDelay);
}
cbTrans.release();
}
else
SC_REPORT_FATAL(0, "Payload event queue in LengthConverter was triggered with unknown phase");
}
void LengthConverter::createChildTranses(tlm_generic_payload* parentTrans)
{
unsigned numChildTranses = parentTrans->get_data_length() / maxOutputLength;
std::vector<tlm_generic_payload*> childTranses;
for (unsigned childId = 0; childId < numChildTranses; childId++)
{
tlm_generic_payload* childTrans = memoryManager.allocate();
childTrans->acquire();
childTrans->set_command(parentTrans->get_command());
childTrans->set_address(parentTrans->get_address() + childId * maxOutputLength);
childTrans->set_data_length(maxOutputLength);
if (storageEnabled && parentTrans->is_write())
std::copy(parentTrans->get_data_ptr() + childId * maxOutputLength, parentTrans->get_data_ptr() +
(childId + 1) * maxOutputLength, childTrans->get_data_ptr());
ChildExtension::setExtension(childTrans, parentTrans);
childTranses.push_back(childTrans);
}
ParentExtension::setExtension(parentTrans, std::move(childTranses));
}
LengthConverter::MemoryManager::MemoryManager(bool storageEnabled, unsigned maxDataLength)
: storageEnabled(storageEnabled), maxDataLength(maxDataLength)
{}
LengthConverter::MemoryManager::~MemoryManager()
{
while (!freePayloads.empty())
{
tlm_generic_payload* payload = freePayloads.top();
if (storageEnabled)
delete[] payload->get_data_ptr();
payload->reset();
delete payload;
freePayloads.pop();
}
}
tlm_generic_payload* LengthConverter::MemoryManager::allocate()
{
if (freePayloads.empty())
{
auto* payload = new tlm_generic_payload(this);
if (storageEnabled)
{
auto* data = new unsigned char[maxDataLength];
payload->set_data_ptr(data);
}
return payload;
}
else
{
tlm_generic_payload* result = freePayloads.top();
freePayloads.pop();
return result;
}
}
void LengthConverter::MemoryManager::free(tlm_generic_payload* payload)
{
freePayloads.push(payload);
}

233
src/simulator/simulator/LengthConverter.h
View File

@@ -1,233 +0,0 @@
/*
* Copyright (c) 2022, Technische Universität Kaiserslautern
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
* OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors:
* Lukas Steiner
*/
#ifndef LENGTHCONVERTER_H
#define LENGTHCONVERTER_H
#include <iostream>
#include <utility>
#include <vector>
#include <queue>
#include <set>
#include <unordered_map>
#include <stack>
#include <tlm>
#include <systemc>
#include <tlm_utils/simple_initiator_socket.h>
#include <tlm_utils/simple_target_socket.h>
#include <tlm_utils/peq_with_cb_and_phase.h>
//TLM_DECLARE_EXTENDED_PHASE(REQ_ARBITRATION);
//TLM_DECLARE_EXTENDED_PHASE(RESP_ARBITRATION);
class LengthConverter : public sc_core::sc_module
{
public:
tlm_utils::simple_initiator_socket<LengthConverter> iSocket;
tlm_utils::simple_target_socket<LengthConverter> tSocket;
LengthConverter(const sc_core::sc_module_name& name, unsigned maxOutputLength, bool storageEnabled);
SC_HAS_PROCESS(LengthConverter);
private:
tlm_utils::peq_with_cb_and_phase<LengthConverter> payloadEventQueue;
void peqCallback(tlm::tlm_generic_payload &payload, const tlm::tlm_phase &phase);
//std::vector<bool> tSocketIsBusy;
//std::vector<bool> iSocketIsBusy;
const unsigned maxOutputLength;
const bool storageEnabled;
void createChildTranses(tlm::tlm_generic_payload* parentTrans);
//std::uint64_t getTargetAddress(std::uint64_t address) const;
//int getISocketId(std::uint64_t address) const;
//std::vector<std::queue<tlm::tlm_generic_payload *>> pendingRequests;
tlm::tlm_sync_enum nb_transport_fw(tlm::tlm_generic_payload &trans, tlm::tlm_phase &phase,
sc_core::sc_time &fwDelay);
tlm::tlm_sync_enum nb_transport_bw(tlm::tlm_generic_payload &payload, tlm::tlm_phase &phase,
sc_core::sc_time &bwDelay);
unsigned int transport_dbg(tlm::tlm_generic_payload &trans);
class MemoryManager : public tlm::tlm_mm_interface
{
public:
MemoryManager(bool storageEnabled, unsigned maxDataLength);
~MemoryManager() override;
tlm::tlm_generic_payload* allocate();
void free(tlm::tlm_generic_payload* payload) override;
private:
std::stack<tlm::tlm_generic_payload*> freePayloads;
bool storageEnabled = false;
unsigned maxDataLength;
} memoryManager;
class ChildExtension : public tlm::tlm_extension<ChildExtension>
{
private:
tlm::tlm_generic_payload* parentTrans;
explicit ChildExtension(tlm::tlm_generic_payload* parentTrans) : parentTrans(parentTrans) {}
public:
//ChildExtension() = delete;
tlm_extension_base* clone() const override
{
return new ChildExtension(parentTrans);
}
void copy_from(tlm_extension_base const &ext) override
{
const auto& cpyFrom = dynamic_cast<const ChildExtension&>(ext);
parentTrans = cpyFrom.parentTrans;
}
tlm::tlm_generic_payload* getParentTrans()
{
return parentTrans;
}
static void setExtension(tlm::tlm_generic_payload* childTrans, tlm::tlm_generic_payload* parentTrans)
{
auto *extension = childTrans->get_extension<ChildExtension>();
if (extension != nullptr)
{
extension->parentTrans = parentTrans;
}
else
{
extension = new ChildExtension(parentTrans);
childTrans->set_auto_extension(extension);
}
}
static bool isChildTrans(const tlm::tlm_generic_payload* trans)
{
if (trans->get_extension<ChildExtension>() != nullptr)
return true;
else
return false;
}
tlm::tlm_generic_payload* getNextChildTrans()
{
return parentTrans->get_extension<ParentExtension>()->getNextChildTrans();
}
bool notifyChildTransCompletion()
{
return parentTrans->get_extension<ParentExtension>()->notifyChildTransCompletion();
}
};
class ParentExtension : public tlm::tlm_extension<ParentExtension>
{
private:
std::vector<tlm::tlm_generic_payload*> childTranses;
unsigned nextEndReqChildId = 0;
unsigned completedChildTranses = 0;
explicit ParentExtension(std::vector<tlm::tlm_generic_payload*> _childTranses)
: childTranses(std::move(_childTranses)) {}
public:
ParentExtension() = delete;
tlm_extension_base* clone() const override
{
return new ParentExtension(childTranses);
}
void copy_from(tlm_extension_base const &ext) override
{
const auto& cpyFrom = dynamic_cast<const ParentExtension&>(ext);
childTranses = cpyFrom.childTranses;
}
static bool isParentTrans(const tlm::tlm_generic_payload* trans)
{
auto* extension = trans->get_extension<ParentExtension>();
if (extension != nullptr)
return !extension->childTranses.empty();
else
return false;
}
static void setExtension(tlm::tlm_generic_payload* parentTrans, std::vector<tlm::tlm_generic_payload*> childTranses)
{
auto* extension = parentTrans->get_extension<ParentExtension>();
if (extension != nullptr)
{
extension->childTranses = std::move(childTranses);
extension->nextEndReqChildId = 0;
extension->completedChildTranses = 0;
}
else
{
extension = new ParentExtension(std::move(childTranses));
parentTrans->set_auto_extension(extension);
}
}
tlm::tlm_generic_payload* getNextChildTrans()
{
if (nextEndReqChildId < childTranses.size())
return childTranses[nextEndReqChildId++];
else
return nullptr;
}
bool notifyChildTransCompletion()
{
completedChildTranses++;
return completedChildTranses == childTranses.size();
}
void releaseChildTranses()
{
std::for_each(childTranses.begin(), childTranses.end(),
[](tlm::tlm_generic_payload* childTrans){childTrans->release();});
childTranses.clear();
}
};
};
#endif // LENGTHCONVERTER_H

3
src/simulator/simulator/MemoryManager.cpp
View File

@@ -36,8 +36,7 @@
#include "MemoryManager.h"
#include <DRAMSys/common/DebugManager.h>
#include <DRAMSys/configuration/Configuration.h>
#include "DRAMSys/common/DebugManager.h"
using namespace tlm;

1
src/simulator/simulator/MemoryManager.h
View File

@@ -39,7 +39,6 @@
#include <unordered_map>
#include <stack>
#include <tlm>
class MemoryManager : public tlm::tlm_mm_interface

2
src/simulator/simulator/StlPlayer.cpp
View File

@@ -215,7 +215,7 @@ void StlPlayer::parseTraceFile()
}
}
std::vector<LineContent>::const_iterator StlPlayer::swapBuffers()
std::vector<StlPlayer::LineContent>::const_iterator StlPlayer::swapBuffers()
{
// Wait for parser to finish
if (parserThread.joinable())

24
src/simulator/simulator/StlPlayer.h
View File

@@ -41,25 +41,16 @@
#ifndef STLPLAYER_H
#define STLPLAYER_H
#include "simulator/TraceSetup.h"
#include "simulator/TrafficInitiator.h"
#include <sstream>
#include <vector>
#include <array>
#include <thread>
#include <fstream>
#include <systemc>
#include <tlm>
#include "TraceSetup.h"
#include "TrafficInitiator.h"
struct LineContent
{
sc_core::sc_time sendingTime;
unsigned dataLength;
tlm::tlm_command command;
uint64_t address;
std::vector<unsigned char> data;
};
class StlPlayer : public TrafficInitiator
{
@@ -78,6 +69,15 @@ public:
uint64_t getNumberOfLines() const;
private:
struct LineContent
{
sc_core::sc_time sendingTime;
unsigned dataLength;
tlm::tlm_command command;
uint64_t address;
std::vector<unsigned char> data;
};
void parseTraceFile();
std::vector<LineContent>::const_iterator swapBuffers();

8
src/simulator/simulator/TraceSetup.cpp
View File

@@ -36,8 +36,10 @@
*/
#include "TraceSetup.h"
#include "StlPlayer.h"
#include "TrafficGenerator.h"
#include "simulator/StlPlayer.h"
#include "simulator/TrafficGenerator.h"
#include <algorithm>
#include <iomanip>
#include <map>
@@ -113,7 +115,7 @@ TraceSetup::TraceSetup(const Configuration& config,
}
else if constexpr (std::is_same_v<T, DRAMSys::Config::TraceGenerator>)
{
TrafficGenerator *trafficGenerator = new TrafficGenerator(name.c_str(), config, initiator, *this);
auto* trafficGenerator = new TrafficGenerator(name.c_str(), config, initiator, *this);
players.push_back(std::unique_ptr<TrafficInitiator>(trafficGenerator));
totalTransactions += trafficGenerator->getTotalTransactions();

7
src/simulator/simulator/TraceSetup.h
View File

@@ -37,17 +37,16 @@
#ifndef TRACESETUP_H
#define TRACESETUP_H
#include <DRAMSys/config/DRAMSysConfiguration.h>
#include "simulator/MemoryManager.h"
#include <DRAMSys/configuration/Configuration.h>
#include "DRAMSys/config/DRAMSysConfiguration.h"
#include "DRAMSys/configuration/Configuration.h"
#include <vector>
#include <string>
#include <memory>
#include <tlm>
#include "MemoryManager.h"
class TrafficInitiator;
class TraceSetup

3
src/simulator/simulator/TrafficGenerator.cpp
View File

@@ -37,7 +37,8 @@
*/
#include "TrafficGenerator.h"
#include "TraceSetup.h"
#include "simulator/TraceSetup.h"
#include <limits>

6
src/simulator/simulator/TrafficGenerator.h
View File

@@ -39,13 +39,13 @@
#ifndef TRAFFICGENERATOR_H
#define TRAFFICGENERATOR_H
#include "simulator/TrafficInitiator.h"
#include "simulator/TraceSetup.h"
#include <cstdint>
#include <map>
#include <random>
#include <simulator/TrafficInitiator.h>
#include <simulator/TraceSetup.h>
class TrafficGeneratorIf : public TrafficInitiator
{
public:

2
src/simulator/simulator/TrafficInitiator.cpp
View File

@@ -129,7 +129,7 @@ bool TrafficInitiator::nextPayloadSendable() const
return true;
}
sc_core::sc_time TrafficInitiator::evaluateGeneratorClk(const DRAMSys::Config::TrafficInitiator &conf)
sc_core::sc_time TrafficInitiator::evaluateGeneratorClk(const DRAMSys::Config::TrafficInitiator& conf)
{
double frequencyMHz = conf.clkMhz;
sc_time playerClk = sc_time(1.0 / frequencyMHz, SC_US);

11
src/simulator/simulator/TrafficInitiator.h
View File

@@ -40,20 +40,19 @@
#ifndef TRAFFICINITIATOR_H
#define TRAFFICINITIATOR_H
#include "simulator/TraceSetup.h"
#include "DRAMSys/configuration/Configuration.h"
#include "DRAMSys/common/DebugManager.h"
#include <deque>
#include <iostream>
#include <string>
#include <tlm>
#include <systemc>
#include <tlm_utils/simple_initiator_socket.h>
#include <tlm_utils/peq_with_cb_and_phase.h>
#include <DRAMSys/configuration/Configuration.h>
#include <DRAMSys/common/DebugManager.h>
#include <simulator/TraceSetup.h>
class TrafficInitiator : public sc_core::sc_module
{
public:

22
src/simulator/simulator/main.cpp
View File

@@ -37,26 +37,22 @@
* Derek Christ
*/
#include "simulator/TraceSetup.h"
#include "simulator/TrafficInitiator.h"
#include "DRAMSys/simulation/DRAMSys.h"
#ifdef RECORDING
#include "DRAMSys/simulation/DRAMSysRecordable.h"
#endif
#include "DRAMSys/config/DRAMSysConfiguration.h"
#include <iostream>
#include <memory>
#include <string>
#include <utility>
#include <vector>
#include <list>
#include <chrono>
#include <DRAMSys/config/DRAMSysConfiguration.h>
#include <memory>
#include <systemc>
#include <DRAMSys/simulation/DRAMSys.h>
#include <simulator/TraceSetup.h>
#include <simulator/TrafficInitiator.h>
#ifdef RECORDING
#include "simulation/DRAMSysRecordable.h"
#endif
using namespace sc_core;
std::string pathOfFile(const std::string &file)

2
src/util/DRAMSys/util/json.h
View File

@@ -37,7 +37,7 @@
#ifndef DRAMSYS_UTIL_JSON_H
#define DRAMSYS_UTIL_JSON_H
#include <nlohmann/json.hpp>
#include "nlohmann/json.hpp"
#include <optional>