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bankgroup is now recorded

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This commit is contained in:
robert
2014-04-10 10:14:20 +02:00
parent 78e90f87cd
commit a433ad6fcf
12 changed files with 95 additions and 20 deletions
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2
dram/.cproject
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@@ -19,7 +19,7 @@
<builder autoBuildTarget="all" buildPath="${workspace_loc:/dram}/build-simulation" cleanBuildTarget="clean" enableAutoBuild="false" id="org.eclipse.cdt.build.core.internal.builder.1698165306" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="CDT Internal Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.internal.builder"/>
<tool id="cdt.managedbuild.tool.gnu.archiver.base.1509734096" name="GCC Archiver" superClass="cdt.managedbuild.tool.gnu.archiver.base"/>
<tool id="cdt.managedbuild.tool.gnu.cpp.compiler.exe.debug.789860529" name="GCC C++ Compiler" superClass="cdt.managedbuild.tool.gnu.cpp.compiler.exe.debug">
<option id="gnu.cpp.compiler.exe.debug.option.optimization.level.2041174282" name="Optimization Level" superClass="gnu.cpp.compiler.exe.debug.option.optimization.level" value="gnu.cpp.compiler.optimization.level.none" valueType="enumerated"/>
<option id="gnu.cpp.compiler.exe.debug.option.optimization.level.2041174282" name="Optimization Level" superClass="gnu.cpp.compiler.exe.debug.option.optimization.level" value="gnu.cpp.compiler.optimization.level.most" valueType="enumerated"/>
<option id="gnu.cpp.compiler.exe.debug.option.debugging.level.2092267417" name="Debug Level" superClass="gnu.cpp.compiler.exe.debug.option.debugging.level" value="gnu.cpp.compiler.debugging.level.max" valueType="enumerated"/>
<option id="gnu.cpp.compiler.option.include.paths.1823643375" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
<listOptionValue builtIn="false" value="/opt/systemc-2.3.0/include"/>

3
dram/.gitignore vendored
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@@ -1,4 +1,5 @@
/build-simulation
*.tdb
*.tdb-journal
*.out
*.out
*.txt

11
dram/resources/configs/memconfigs/fifo.xml Normal file
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@@ -0,0 +1,11 @@
<memspec>
<memconfig>
<parameter id="bankwiseLogic" type="bool" value="0" />
<parameter id="openPagePolicy" type="bool" value="1" />
<parameter id="adaptiveOpenPagePolicy" type="bool" value="0" />
<parameter id="refreshAwareScheduling" type="bool" value="0" />
<parameter id="maxNrOfTransactionsInDram" type="uint" value="50" />
<parameter id="scheduler" type="string" value="FIFO" />
<parameter id="capsize" type="uint" value="5" />
</memconfig>
</memspec>

11
dram/resources/configs/memconfigs/fr_fcfs.xml Normal file
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@@ -0,0 +1,11 @@
<memspec>
<memconfig>
<parameter id="bankwiseLogic" type="bool" value="0" />
<parameter id="openPagePolicy" type="bool" value="1" />
<parameter id="adaptiveOpenPagePolicy" type="bool" value="0" />
<parameter id="refreshAwareScheduling" type="bool" value="1" />
<parameter id="maxNrOfTransactionsInDram" type="uint" value="50" />
<parameter id="scheduler" type="string" value="FR_FCFS" />
<parameter id="capsize" type="uint" value="5" />
</memconfig>
</memspec>

11
dram/resources/configs/memconfigs/fr_fcfs_unaware.xml Normal file
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@@ -0,0 +1,11 @@
<memspec>
<memconfig>
<parameter id="bankwiseLogic" type="bool" value="0" />
<parameter id="openPagePolicy" type="bool" value="1" />
<parameter id="adaptiveOpenPagePolicy" type="bool" value="0" />
<parameter id="refreshAwareScheduling" type="bool" value="0" />
<parameter id="maxNrOfTransactionsInDram" type="uint" value="50" />
<parameter id="scheduler" type="string" value="FR_FCFS" />
<parameter id="capsize" type="uint" value="5" />
</memconfig>
</memspec>

11
dram/resources/configs/memconfigs/par_bs.xml Normal file
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@@ -0,0 +1,11 @@
<memspec>
<memconfig>
<parameter id="bankwiseLogic" type="bool" value="0" />
<parameter id="openPagePolicy" type="bool" value="1" />
<parameter id="adaptiveOpenPagePolicy" type="bool" value="0" />
<parameter id="refreshAwareScheduling" type="bool" value="1" />
<parameter id="maxNrOfTransactionsInDram" type="uint" value="50" />
<parameter id="scheduler" type="string" value="PAR_BS" />
<parameter id="capsize" type="uint" value="5" />
</memconfig>
</memspec>

11
dram/resources/configs/memconfigs/par_bs_unaware.xml Normal file
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@@ -0,0 +1,11 @@
<memspec>
<memconfig>
<parameter id="bankwiseLogic" type="bool" value="0" />
<parameter id="openPagePolicy" type="bool" value="1" />
<parameter id="adaptiveOpenPagePolicy" type="bool" value="0" />
<parameter id="refreshAwareScheduling" type="bool" value="0" />
<parameter id="maxNrOfTransactionsInDram" type="uint" value="50" />
<parameter id="scheduler" type="string" value="PAR_BS" />
<parameter id="capsize" type="uint" value="5" />
</memconfig>
</memspec>

2
dram/resources/configs/memspecs/MatzesWideIO.xml
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@@ -28,7 +28,7 @@
<!--<parameter id="XPDLL" type="uint" value="2" />-->
<parameter id="XS" type="uint" value="2" /><!--tRFC+2clk-->
<!--<parameter id="XSDLL" type="uint" value="20" />-->
<parameter id="REFI" type="uint" value="1300" />
<parameter id="REFI" type="uint" value="300" /> <!-- 1300 -->
<!--<parameter id="CL" type="uint" value="3" />-->
<parameter id="TAW" type="uint" value="10" />
<parameter id="RRD" type="uint" value="2" />

2
dram/src/common/DebugManager.cpp
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@@ -23,7 +23,7 @@ void DebugManager::printDebugMessage(string sender, string message)
cout << " at " << sc_time_stamp() << "\t in " << sender << "\t: " << message << endl;
if (writeToFile)
debugFile << " at " << sc_time_stamp().to_default_time_units() << " in " << sender << "\t: " << message << "\n";
debugFile << " at " << sc_time_stamp() << " in " << sender << "\t: " << message << "\n";
}
}

5
dram/src/simulation/Controller.h
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@@ -65,6 +65,11 @@ public:
if (selectedScheduler == "FR_FCFS")
{
if(Configuration::getInstance().RefreshAwareScheduling)
cout << "Building refresh aware scheduler" << std::endl;
else
cout << "Building refresh un-aware scheduler" << std::endl;
scheduler = new FR_FCFS(controller->state.bankStates,
Configuration::getInstance().RefreshAwareScheduling,
Configuration::getInstance().AdaptiveOpenPagePolicy);

3
dram/src/simulation/SimulationManager.cpp
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@@ -39,7 +39,6 @@ Simulation::Simulation(sc_module_name name, string pathToResources, string trace
arbiter = new Arbiter<numberOfTracePlayers, 128>("arbiter");
controller = new Controller<>("controller");
player1 = new TracePlayer<>("player1", pathToResources + string("traces/") + devices[0].trace,
devices[0].burstLength, this);
player2 = new TracePlayer<>("player2", pathToResources + string("traces/") + devices[1].trace,
@@ -78,8 +77,6 @@ Simulation::~Simulation()
void Simulation::startSimulation()
{
clock_t begin = clock();
DebugManager::getInstance().printDebugMessage(name(), "Starting simulation");

43
dram/src/simulation/main.cpp
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@@ -19,6 +19,7 @@ using namespace std;
using namespace simulation;
string resources;
bool silent = true;
string pathOfFile(string file)
{
@@ -32,13 +33,13 @@ void startTraceAnalyzer(string traceName)
system(run_tpr.c_str());
}
bool runSimulation(string resources, string traceName, DramSetup setup, vector<Device> devices)
bool runSimulation(string traceName, DramSetup setup, vector<Device> devices)
{
int pid = fork();
int status = 0;
if (pid == 0)
{
Simulation simulation("sim", resources, traceName, setup, devices);
Simulation simulation("sim", resources, traceName, setup, devices,silent);
simulation.startSimulation();
return true;
}
@@ -53,7 +54,7 @@ bool batchTraces(DramSetup setup, vector<pair<string, string>> tracePairs)
{
id++;
string traceName = "traceBatch" + to_string(id) + ".tdb";
if (runSimulation(resources, traceName, setup, { Device(pair.first), Device(pair.second) }))
if (runSimulation(traceName, setup, { Device(pair.first), Device(pair.second) }))
return true; //kill child
}
}
@@ -65,7 +66,7 @@ bool batchSetups(pair<string, string> tracePair, vector<DramSetup> setups)
{
id++;
string traceName = "setupBatch" + to_string(id) + ".tdb";
if (runSimulation(resources, traceName, setup,
if (runSimulation(traceName, setup,
{ Device(tracePair.first), Device(tracePair.second) }))
return true; //kill child
}
@@ -76,21 +77,37 @@ int sc_main(int argc, char **argv)
resources = pathOfFile(argv[0]) + string("/../resources/");
DramSetup setup;
setup.memconfig = "memconfig.xml";
setup.memspec = "MICRON_4Gb_DDR4-1866_8bit_A.xml";
//setup.memspec = "MatzesWideIO.xml";
vector<pair<string, string>> tracePairs;
tracePairs.push_back(pair<string, string>("chstone-mips_32.stl", "chstone-motion_32.stl"));
batchTraces(setup, tracePairs);
// DramSetup setup;
// setup.memconfig = "memconfig.xml";
// //setup.memspec = "MICRON_4Gb_DDR4-1866_8bit_A.xml";
// setup.memspec = "MatzesWideIO.xml";
//
// vector<pair<string, string>> tracePairs;
// tracePairs.push_back(pair<string, string>("chstone-mips_32.stl", "chstone-motion_32.stl"));
//
// batchTraces(setup, tracePairs);
// DramSetup setup2;
// setup2.memconfig = "memconfig.xml";
// setup2.memspec = "MICRON_4Gb_DDR4-1866_8bit_A.xml";
//batchSetups(tracePairs[0], { setup, setup2 });
Device d1("mediabench-c-ray-1.1_32.stl",4);
Device d2("mediabench-fractal_32.stl",4);
string dramSpec = "MatzesWideIO.xml";
if(runSimulation("fifo.tdb",DramSetup("fifo.xml",dramSpec),{d1,d2}))
return 0;
if(runSimulation("fr_fcfs.tdb",DramSetup("fr_fcfs.xml",dramSpec),{d1,d2}))
return 0;
if(runSimulation("fr_fcfs_unaware.tdb",DramSetup("fr_fcfs_unaware.xml",dramSpec),{d1,d2}))
return 0;
if(runSimulation("par_bs.tdb",DramSetup("par_bs.xml",dramSpec),{d1,d2}))
return 0;
if(runSimulation("par_bs_unaware.tdb",DramSetup("par_bs_unaware.xml",dramSpec),{d1,d2}))
return 0;
startTraceAnalyzer("fifo.tdb fr_fcfs.tdb fr_fcfs_unaware.tdb par_bs.tdb par_bs_unaware.tdb");
return 0;
}