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Using python3 print style

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Other changes:
- double increment in the clock cycle removed.
- bank_group --> bgroup
This commit is contained in:
Eder F. Zulian
2018-05-24 15:21:36 +02:00
parent e53945f873
commit 953902166e
1 changed files with 7 additions and 8 deletions
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15
DRAMSys/library/resources/scripts/trace_gen.py
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@@ -1,4 +1,4 @@
#!/usr/bin/env python
#! /usr/bin/env python3
# vim: set fileencoding=utf-8
# Copyright (c) 2018, University of Kaiserslautern
@@ -73,7 +73,7 @@ import ctypes
# Transaction type (read or write)
transaction = 'read'
# Channel information. If your address mapping does not have bank groups keep
# Channel information. If your address mapping does not have channel bits keep
# it equal to 1 and set the shift to the extreme left of the address.
num_ch = 1 # Number of channels
ch_shift = 34 # Shift to reach the frist bit reserved for channels in the address
@@ -82,8 +82,8 @@ ch_mask = 0x1 # Mask for all channel bits in the address
# Bank group information. If your address mapping does not have bank groups
# keep it equal to 1 and set the shift to the extreme left of the address.
num_bank_groups = 1 # Number of bank groups
bank_group_shift = 33 # Shift to reach the frist bit reserved for bank groups in the address
bank_group_mask = 0x1 # Mask for all bits in the address related to bank groups
bgroup_shift = 33 # Shift to reach the frist bit reserved for bank groups in the address
bgroup_mask = 0x1 # Mask for all bits in the address related to bank groups
# Bank information
num_banks = 8 # Number of banks
@@ -125,14 +125,13 @@ address = 0
for ch in range(0, num_ch):
address = set_bits(ch_mask, ch_shift, address, ch)
for bg in range(0, num_bank_groups):
address = set_bits(bank_group_mask, bank_group_shift, address, bg)
address = set_bits(bgroup_mask, bgroup_shift, address, bg)
for b in range(0, num_banks):
address = set_bits(bank_mask, bank_shift, address, b)
for row in range(0, num_rows):
address = set_bits(row_mask, row_shift, address, row)
clock_cycle = clock_cycle + clock_increment
for col in range(0, num_col, burst_len):
address = set_bits(col_mask, col_shift, address, col)
print "# clock cycle: {0:d} | {1} | address: 0x{2:010X} | channel: {3} | bank group: {4} | bank: {5} | row: {6} | column: {7}".format(clock_cycle, transaction, address, ch, bg, b, row, col)
print "{0:d}:\t{1}\t0x{2:010X}".format(clock_cycle, transaction, address)
print('# clock cycle: {0:d} | {1} | address: 0x{2:010X} | channel: {3} | bank group: {4} | bank: {5} | row: {6} | column: {7}'.format(clock_cycle, transaction, address, ch, bg, b, row, col))
print('{0:d}:\t{1}\t0x{2:010X}'.format(clock_cycle, transaction, address))
clock_cycle = clock_cycle + clock_increment