Added support to bank groups

This commit is contained in:
Éder F. Zulian
2018-05-24 14:49:22 +02:00
parent 9891f0f77f
commit e53945f873

View File

@@ -73,11 +73,17 @@ import ctypes
# Transaction type (read or write)
transaction = 'read'
# Channel information. This is DRAMSys specific. The channel bits come after
# the last regular address bit.
# Channel information. If your address mapping does not have bank groups keep
# it equal to 1 and set the shift to the extreme left of the address.
num_ch = 1 # Number of channels
ch_shift = 33 # Shift to reach the frist bit reserved for channels in the address
ch_mask = 0x3 # Mask for all channel bits in the address
ch_shift = 34 # Shift to reach the frist bit reserved for channels in the address
ch_mask = 0x1 # Mask for all channel bits in the address
# Bank group information. If your address mapping does not have bank groups
# keep it equal to 1 and set the shift to the extreme left of the address.
num_bank_groups = 1 # Number of bank groups
bank_group_shift = 33 # Shift to reach the frist bit reserved for bank groups in the address
bank_group_mask = 0x1 # Mask for all bits in the address related to bank groups
# Bank information
num_banks = 8 # Number of banks
@@ -118,13 +124,15 @@ def set_bits(mask, shift, val, v):
address = 0
for ch in range(0, num_ch):
address = set_bits(ch_mask, ch_shift, address, ch)
for b in range(0, num_banks):
address = set_bits(bank_mask, bank_shift, address, b)
for row in range(0, num_rows):
address = set_bits(row_mask, row_shift, address, row)
clock_cycle = clock_cycle + clock_increment
for col in range(0, num_col, burst_len):
address = set_bits(col_mask, col_shift, address, col)
print "# clock cycle: {0:d} | {1} | address: 0x{2:010X} | channel: {3} | bank: {4} | row: {5} | column: {6}".format(clock_cycle, transaction, address, ch, b, row, col)
print "{0:d}:\t{1}\t0x{2:010X}".format(clock_cycle, transaction, address)
clock_cycle = clock_cycle + clock_increment
for bg in range(0, num_bank_groups):
address = set_bits(bank_group_mask, bank_group_shift, address, bg)
for b in range(0, num_banks):
address = set_bits(bank_mask, bank_shift, address, b)
for row in range(0, num_rows):
address = set_bits(row_mask, row_shift, address, row)
clock_cycle = clock_cycle + clock_increment
for col in range(0, num_col, burst_len):
address = set_bits(col_mask, col_shift, address, col)
print "# clock cycle: {0:d} | {1} | address: 0x{2:010X} | channel: {3} | bank group: {4} | bank: {5} | row: {6} | column: {7}".format(clock_cycle, transaction, address, ch, bg, b, row, col)
print "{0:d}:\t{1}\t0x{2:010X}".format(clock_cycle, transaction, address)
clock_cycle = clock_cycle + clock_increment