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Add selection of fine granularity refresh mode.

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This commit is contained in:
Lukas Steiner
2020-10-02 16:12:14 +02:00
parent 7f049645ca
commit 6a8ce57d08
15 changed files with 130 additions and 63 deletions
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15
DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-3200A.json
View File

@@ -14,7 +14,8 @@
"width": 8,
"nbrOfDevicesOnDIMM": 4,
"nbrOfChannels": 2,
"cmdMode": 1
"cmdMode": 1,
"refMode": 1
},
"memoryId": "JEDEC_2x4x1Gbx8_DDR5-3200A",
"memoryType": "DDR5",
@@ -46,12 +47,16 @@
"FAW_dlr": 0,
"WTR_L": 16,
"WTR_S": 4,
"RFC_slr": 312,
"RFC_dlr": 0,
"RFC_dpr": 0,
"RFC1_slr": 312,
"RFC2_slr": 208,
"RFC1_dlr": 0,
"RFC2_dlr": 0,
"RFC1_dpr": 0,
"RFC2_dpr": 0,
"RFCsb_slr": 184,
"RFCsb_dlr": 0,
"REFI": 6240,
"REFI1": 6240,
"REFI2": 3120,
"REFISB": 1560,
"REFSBRD_slr": 48,
"REFSBRD_dlr": 0,

15
DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-3600A.json
View File

@@ -14,7 +14,8 @@
"width": 8,
"nbrOfDevicesOnDIMM": 4,
"nbrOfChannels": 2,
"cmdMode": 1
"cmdMode": 1,
"refMode": 1
},
"memoryId": "JEDEC_2x4x1Gbx8_DDR5-3600A",
"memoryType": "DDR5",
@@ -46,12 +47,16 @@
"FAW_dlr": 0,
"WTR_L": 18,
"WTR_S": 5,
"RFC_slr": 351,
"RFC_dlr": 0,
"RFC_dpr": 0,
"RFC1_slr": 351,
"RFC2_slr": 234,
"RFC1_dlr": 0,
"RFC2_dlr": 0,
"RFC1_dpr": 0,
"RFC2_dpr": 0,
"RFCsb_slr": 207,
"RFCsb_dlr": 0,
"REFI": 7020,
"REFI1": 7020,
"REFI2": 3510,
"REFISB": 1755,
"REFSBRD_slr": 54,
"REFSBRD_dlr": 0,

15
DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-4000A.json
View File

@@ -14,7 +14,8 @@
"width": 8,
"nbrOfDevicesOnDIMM": 4,
"nbrOfChannels": 2,
"cmdMode": 1
"cmdMode": 1,
"refMode": 1
},
"memoryId": "JEDEC_2x4x1Gbx8_DDR5-4000A",
"memoryType": "DDR5",
@@ -46,12 +47,16 @@
"FAW_dlr": 0,
"WTR_L": 20,
"WTR_S": 5,
"RFC_slr": 390,
"RFC_dlr": 0,
"RFC_dpr": 0,
"RFC1_slr": 390,
"RFC2_slr": 260,
"RFC1_dlr": 0,
"RFC2_dlr": 0,
"RFC1_dpr": 0,
"RFC2_dpr": 0,
"RFCsb_slr": 230,
"RFCsb_dlr": 0,
"REFI": 7800,
"REFI1": 7800,
"REFI2": 3900,
"REFISB": 1950,
"REFSBRD_slr": 60,
"REFSBRD_dlr": 0,

15
DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-4400A.json
View File

@@ -14,7 +14,8 @@
"width": 8,
"nbrOfDevicesOnDIMM": 4,
"nbrOfChannels": 2,
"cmdMode": 1
"cmdMode": 1,
"refMode": 1
},
"memoryId": "JEDEC_2x4x1Gbx8_DDR5-4400A",
"memoryType": "DDR5",
@@ -46,12 +47,16 @@
"FAW_dlr": 0,
"WTR_L": 22,
"WTR_S": 6,
"RFC_slr": 429,
"RFC_dlr": 0,
"RFC_dpr": 0,
"RFC_slr": 429,
"RFC_slr": 286,
"RFC_dlr": 0,
"RFC_dlr": 0,
"RFC_dpr": 0,
"RFC_dpr": 0,
"RFCsb_slr": 253,
"RFCsb_dlr": 0,
"REFI": 8580,
"REFI1": 8580,
"REFI2": 4290,
"REFISB": 2145,
"REFSBRD_slr": 66,
"REFSBRD_dlr": 0,

15
DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-4800A.json
View File

@@ -14,7 +14,8 @@
"width": 8,
"nbrOfDevicesOnDIMM": 4,
"nbrOfChannels": 2,
"cmdMode": 1
"cmdMode": 1,
"refMode": 1
},
"memoryId": "JEDEC_2x4x1Gbx8_DDR5-4800A",
"memoryType": "DDR5",
@@ -46,12 +47,16 @@
"FAW_dlr": 0,
"WTR_L": 24,
"WTR_S": 6,
"RFC_slr": 468,
"RFC_dlr": 0,
"RFC_dpr": 0,
"RFC1_slr": 468,
"RFC2_slr": 312,
"RFC1_dlr": 0,
"RFC2_dlr": 0,
"RFC1_dpr": 0,
"RFC2_dpr": 0,
"RFCsb_slr": 276,
"RFCsb_dlr": 0,
"REFI": 9360,
"REFI1": 9360,
"REFI2": 4680,
"REFISB": 2340,
"REFSBRD_slr": 72,
"REFSBRD_dlr": 0,

15
DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-5200A.json
View File

@@ -14,7 +14,8 @@
"width": 8,
"nbrOfDevicesOnDIMM": 4,
"nbrOfChannels": 2,
"cmdMode": 1
"cmdMode": 1,
"refMode": 1
},
"memoryId": "JEDEC_2x4x1Gbx8_DDR5-5200A",
"memoryType": "DDR5",
@@ -46,12 +47,16 @@
"FAW_dlr": 0,
"WTR_L": 26,
"WTR_S": 7,
"RFC_slr": 507,
"RFC_dlr": 0,
"RFC_dpr": 0,
"RFC1_slr": 507,
"RFC2_slr": 338,
"RFC1_dlr": 0,
"RFC2_dlr": 0,
"RFC1_dpr": 0,
"RFC2_dpr": 0,
"RFCsb_slr": 299,
"RFCsb_dlr": 0,
"REFI": 10140,
"REFI1": 10140,
"REFI2": 5070,
"REFISB": 2535,
"REFSBRD_slr": 78,
"REFSBRD_dlr": 0,

15
DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-5600A.json
View File

@@ -14,7 +14,8 @@
"width": 8,
"nbrOfDevicesOnDIMM": 4,
"nbrOfChannels": 2,
"cmdMode": 1
"cmdMode": 1,
"refMode": 1
},
"memoryId": "JEDEC_2x4x1Gbx8_DDR5-5600A",
"memoryType": "DDR5",
@@ -46,12 +47,16 @@
"FAW_dlr": 0,
"WTR_L": 28,
"WTR_S": 7,
"RFC_slr": 546,
"RFC_dlr": 0,
"RFC_dpr": 0,
"RFC1_slr": 546,
"RFC2_slr": 364,
"RFC1_dlr": 0,
"RFC2_dlr": 0,
"RFC1_dpr": 0,
"RFC2_dpr": 0,
"RFCsb_slr": 322,
"RFCsb_dlr": 0,
"REFI": 10920,
"REFI1": 10920,
"REFI2": 5460,
"REFISB": 2730,
"REFSBRD_slr": 84,
"REFSBRD_dlr": 0,

15
DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-6000A.json
View File

@@ -14,7 +14,8 @@
"width": 8,
"nbrOfDevicesOnDIMM": 4,
"nbrOfChannels": 2,
"cmdMode": 1
"cmdMode": 1,
"refMode": 1
},
"memoryId": "JEDEC_2x4x1Gbx8_DDR5-6000A",
"memoryType": "DDR5",
@@ -46,12 +47,16 @@
"FAW_dlr": 0,
"WTR_L": 30,
"WTR_S": 8,
"RFC_slr": 585,
"RFC_dlr": 0,
"RFC_dpr": 0,
"RFC1_slr": 585,
"RFC2_slr": 390,
"RFC1_dlr": 0,
"RFC2_dlr": 0,
"RFC1_dpr": 0,
"RFC2_dpr": 0,
"RFCsb_slr": 345,
"RFCsb_dlr": 0,
"REFI": 11700,
"REFI1": 11700,
"REFI2": 5850,
"REFISB": 2925,
"REFSBRD_slr": 90,
"REFSBRD_dlr": 0,

15
DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-6400A.json
View File

@@ -14,7 +14,8 @@
"width": 8,
"nbrOfDevicesOnDIMM": 4,
"nbrOfChannels": 2,
"cmdMode": 1
"cmdMode": 1,
"refMode": 1
},
"memoryId": "JEDEC_2x4x1Gbx8_DDR5-6400A",
"memoryType": "DDR5",
@@ -46,12 +47,16 @@
"FAW_dlr": 0,
"WTR_L": 32,
"WTR_S": 8,
"RFC_slr": 624,
"RFC_dlr": 0,
"RFC_dpr": 0,
"RFC1_slr": 624,
"RFC2_slr": 416,
"RFC1_dlr": 0,
"RFC2_dlr": 0,
"RFC1_dpr": 0,
"RFC2_dpr": 0,
"RFCsb_slr": 368,
"RFCsb_dlr": 0,
"REFI": 12480,
"REFI1": 12480,
"REFI2": 6240,
"REFISB": 3120,
"REFSBRD_slr": 96,
"REFSBRD_dlr": 0,

15
DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-3200A.json
View File

@@ -14,7 +14,8 @@
"width": 4,
"nbrOfDevicesOnDIMM": 8,
"nbrOfChannels": 2,
"cmdMode": 1
"cmdMode": 1,
"refMode": 1
},
"memoryId": "JEDEC_2x8x8x8Gbx4_DDR5-3200A_4bit",
"memoryType": "DDR5",
@@ -46,12 +47,16 @@
"FAW_dlr": 16,
"WTR_L": 16,
"WTR_S": 4,
"RFC_slr": 312,
"RFC_dlr": 104,
"RFC_dpr": 104,
"RFC1_slr": 312,
"RFC2_slr": 208,
"RFC1_dlr": 104,
"RFC2_dlr": 70,
"RFC1_dpr": 104,
"RFC2_dpr": 70,
"RFCsb_slr": 184,
"RFCsb_dlr": 62,
"REFI": 6240,
"REFI1": 6240,
"REFI2": 3120,
"REFISB": 1560,
"REFSBRD_slr": 48,
"REFSBRD_dlr": 24,

15
DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x8x2Gbx4_DDR5-3200A.json
View File

@@ -14,7 +14,8 @@
"width": 4,
"nbrOfDevicesOnDIMM": 8,
"nbrOfChannels": 2,
"cmdMode": 1
"cmdMode": 1,
"refMode": 1
},
"memoryId": "JEDEC_2x8x8x8Gbx4_DDR5-3200A_4bit",
"memoryType": "DDR5",
@@ -46,12 +47,16 @@
"FAW_dlr": 16,
"WTR_L": 16,
"WTR_S": 4,
"RFC_slr": 312,
"RFC_dlr": 104,
"RFC_dpr": 104,
"RFC1_slr": 312,
"RFC2_slr": 208,
"RFC1_dlr": 104,
"RFC2_dlr": 70,
"RFC1_dpr": 104,
"RFC2_dpr": 70,
"RFCsb_slr": 184,
"RFCsb_dlr": 62,
"REFI": 6240,
"REFI1": 6240,
"REFI2": 3120,
"REFISB": 1560,
"REFSBRD_slr": 48,
"REFSBRD_dlr": 24,

4
DRAMSys/library/resources/simulations/ddr5-example.json
View File

@@ -1,8 +1,8 @@
{
"simulation": {
"addressmapping": "am_ddr5_2x8x2Gbx4_dimm_p1KB_rbc.json",
"addressmapping": "am_ddr5_2x4x1Gbx8_dimm_p1KB_rbc.json",
"mcconfig": "fr_fcfs.json",
"memspec": "JEDEC_2x8x2Gbx4_DDR5-3200A.json",
"memspec": "JEDEC_2x4x1Gbx8_DDR5-3200A.json",
"simconfig": "ddr5.json",
"simulationid": "ddr5-example",
"thermalconfig": "config.json",

17
DRAMSys/library/src/configuration/memspec/MemSpecDDR5.cpp
View File

@@ -58,6 +58,7 @@ MemSpecDDR5::MemSpecDDR5(json &memspec)
logicalRanksPerPhysicalRank(parseUint(memspec["memarchitecturespec"]["nbrOfLogicalRanks"], "nbrOfLogicalRanks")),
numberOfLogicalRanks(logicalRanksPerPhysicalRank * numberOfPhysicalRanks),
cmdMode(parseUint(memspec["memarchitecturespec"]["cmdMode"], "cmdMode")),
refMode(parseUint(memspec["memarchitecturespec"]["refMode"], "refMode")),
tRCD (tCK * parseUint(memspec["memtimingspec"]["RCD"], "RCD")),
tPPD (tCK * parseUint(memspec["memtimingspec"]["PPD"], "PPD")),
tRP (tCK * parseUint(memspec["memtimingspec"]["RP"], "RP")),
@@ -86,12 +87,16 @@ MemSpecDDR5::MemSpecDDR5(json &memspec)
tFAW_dlr (tCK * parseUint(memspec["memtimingspec"]["FAW_dlr"], "FAW_dlr")),
tWTR_L (tCK * parseUint(memspec["memtimingspec"]["WTR_L"], "WTR_L")),
tWTR_S (tCK * parseUint(memspec["memtimingspec"]["WTR_S"], "WTR_S")),
tRFC_slr (tCK * parseUint(memspec["memtimingspec"]["RFC_slr"], "RFC_slr")),
tRFC_dlr (tCK * parseUint(memspec["memtimingspec"]["RFC_dlr"], "RFC_dlr")),
tRFC_dpr (tCK * parseUint(memspec["memtimingspec"]["RFC_dpr"], "RFC_dpr")),
tRFC_slr ((refMode == 1) ? tCK * parseUint(memspec["memtimingspec"]["RFC1_slr"], "RFC1_slr")
: tCK * parseUint(memspec["memtimingspec"]["RFC2_slr"], "RFC2_slr")),
tRFC_dlr ((refMode == 1) ? tCK * parseUint(memspec["memtimingspec"]["RFC1_dlr"], "RFC1_dlr")
: tCK * parseUint(memspec["memtimingspec"]["RFC2_dlr"], "RFC2_dlr")),
tRFC_dpr ((refMode == 1) ? tCK * parseUint(memspec["memtimingspec"]["RFC1_dpr"], "RFC1_dpr")
: tCK * parseUint(memspec["memtimingspec"]["RFC2_dpr"], "RFC2_dpr")),
tRFCsb_slr (tCK * parseUint(memspec["memtimingspec"]["RFCsb_slr"], "RFCsb_slr")),
tRFCsb_dlr (tCK * parseUint(memspec["memtimingspec"]["RFCsb_dlr"], "RFCsb_dlr")),
tREFI (tCK * parseUint(memspec["memtimingspec"]["REFI"], "REFI")),
tREFI ((refMode == 1) ? tCK * parseUint(memspec["memtimingspec"]["REFI1"], "REFI1")
: tCK * parseUint(memspec["memtimingspec"]["REFI2"], "REFI2")),
tREFIsb (tCK * parseUint(memspec["memtimingspec"]["REFISB"], "REFISB")),
tREFSBRD_slr (tCK * parseUint(memspec["memtimingspec"]["REFSBRD_slr"], "REFSBRD_slr")),
tREFSBRD_dlr (tCK * parseUint(memspec["memtimingspec"]["REFSBRD_dlr"], "REFSBRD_dlr")),
@@ -134,6 +139,10 @@ MemSpecDDR5::MemSpecDDR5(json &memspec)
}
else
SC_REPORT_FATAL("MemSpecDDR5", "Invalid command mode!");
if (!(refMode == 1 || refMode == 2))
SC_REPORT_FATAL("MemSpecDDR5", "Invalid refresh mode! "
"Set 1 for normal or 2 for fine granularity refresh mode.");
}
sc_time MemSpecDDR5::getRefreshIntervalAB() const

1
DRAMSys/library/src/configuration/memspec/MemSpecDDR5.h
View File

@@ -50,6 +50,7 @@ public:
const unsigned logicalRanksPerPhysicalRank;
const unsigned numberOfLogicalRanks;
const unsigned cmdMode;
const unsigned refMode;
// Memspec Variables:
const sc_time tRCD;

6
DRAMSys/library/src/controller/refresh/RefreshManagerGroupwise.cpp
View File

@@ -66,8 +66,8 @@ RefreshManagerGroupwise::RefreshManagerGroupwise(std::vector<BankMachine *> &ban
remainingBankMachines = allBankMachines;
currentIterator = remainingBankMachines.begin();
maxPostponed = config.refreshMaxPostponed * memSpec->banksPerGroup;
maxPulledin = -(config.refreshMaxPulledin * memSpec->banksPerGroup);
maxPostponed = static_cast<int>(config.refreshMaxPostponed * memSpec->banksPerGroup);
maxPulledin = -static_cast<int>(config.refreshMaxPulledin * memSpec->banksPerGroup);
}
std::tuple<Command, tlm_generic_payload *, sc_time> RefreshManagerGroupwise::getNextCommand()
@@ -242,5 +242,7 @@ void RefreshManagerGroupwise::updateState(Command command)
case Command::PDXA: case Command::PDXP:
sleeping = false;
break;
default:
break;
}
}