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Updated configuration of DRAMSys.

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This commit is contained in:
Lukas Steiner
2020-03-26 15:45:00 +01:00
parent 75e7047826
commit 51b8614518
39 changed files with 217 additions and 483 deletions
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2
DRAMSys/library/CMakeLists.txt
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@@ -119,7 +119,7 @@ add_library(DRAMSysLibrary
src/controller/refresh/RefreshManagerIF.h
src/controller/refresh/RefreshManagerDummy.cpp
src/controller/refresh/RefreshManager.cpp
src/controller/refresh/RefreshManagerRankwise.cpp
src/controller/refresh/RefreshManagerBankwise.cpp
src/controller/respqueue/RespQueueIF.h

47
DRAMSys/library/resources/configs/mcconfigs/fifo.xml
View File

@@ -1,49 +1,20 @@
<mcconfig>
<MaxNrOfTransactions value="8" />
<!-- Open, OpenAdaptive, Closed, ClosedAdaptive -->
<PagePolicy value="Open" />
<!-- Fifo, FrFcfs, FrFcfsGrp -->
<Scheduler value="Fifo" />
<RequestBufferSize value="8" />
<!-- Oldest, Strict -->
<CmdMux value="Strict" />
<!-- Fifo, Reorder -->
<RespQueue value="Fifo" />
<Capsize value="5" />
<!-- 4 Modes: NoPowerDown, Staggered, TimeoutPDN, TimeoutSREF -->
<PowerDownMode value="NoPowerDown" />
<!-- NoRefresh, Rankwise, Bankwise -->
<RefreshPolicy value="Rankwise" />
<!-- 1: 1X, 2: 2X, 4: 4X (e.g., DDR4) -->
<RefreshMode value="1" />
<RefreshMaxPostponed value="8"/>
<RefreshMaxPulledin value="8"/>
<!-- NoPowerDown, Staggered, TimeoutPDN, TimeoutSREF -->
<PowerDownPolicy value="NoPowerDown" />
<PowerDownTimeout value="100" />
<!-- Bankwise -->
<BankwiseLogic value="0"/>
<!-- Refresh yes, no -->
<ControllerCoreRefDisable value="0"/>
<!-- Refresh Mode. 1: 1X, 2: 2X, 4: 4X (e.g., DDR4) -->
<ControllerCoreRefMode value="1"/>
<!-- Number of AR commands in a tREFI in 1X mode -->
<ControllerCoreRefNumARCmdsIntREFI value="8192"/>
<!-- RGR -->
<ControllerCoreRGR value="0"/>
<ControllerCoreRGRRowInc value="1"/>
<!-- Banks to be refreshed in RGR mode. 1: yes, 0: no (max. 16 banks) -->
<ControllerCoreRGRB0 value="1"/>
<ControllerCoreRGRB1 value="1"/>
<ControllerCoreRGRB2 value="1"/>
<ControllerCoreRGRB3 value="1"/>
<ControllerCoreRGRB4 value="1"/>
<ControllerCoreRGRB5 value="1"/>
<ControllerCoreRGRB6 value="1"/>
<ControllerCoreRGRB7 value="1"/>
<ControllerCoreRGRB8 value="0"/>
<ControllerCoreRGRB9 value="0"/>
<ControllerCoreRGRB10 value="0"/>
<ControllerCoreRGRB11 value="0"/>
<ControllerCoreRGRB12 value="0"/>
<ControllerCoreRGRB13 value="0"/>
<ControllerCoreRGRB14 value="0"/>
<ControllerCoreRGRB15 value="0"/>
<!-- Postpone, pull-in -->
<ControllerCoreRefEnablePostpone value="0"/>
<ControllerCoreRefEnablePullIn value="0"/>
<ControllerCoreRefMaxPostponed value="8"/>
<ControllerCoreRefMaxPulledIn value="8"/>
<ControllerCoreRefForceMaxPostponeBurst value="0"/>
</mcconfig>

47
DRAMSys/library/resources/configs/mcconfigs/fr_fcfs.xml
View File

@@ -1,49 +1,20 @@
<mcconfig>
<MaxNrOfTransactions value="8" />
<!-- Open, OpenAdaptive, Closed, ClosedAdaptive -->
<PagePolicy value="Open" />
<!-- Fifo, FrFcfs, FrFcfsGrp -->
<Scheduler value="FrFcfs" />
<RequestBufferSize value="8" />
<!-- Oldest, Strict -->
<CmdMux value="Oldest" />
<!-- Fifo, Reorder -->
<RespQueue value="Fifo" />
<Capsize value="5" />
<!-- 4 Modes: NoPowerDown, Staggered, TimeoutPDN, TimeoutSREF -->
<PowerDownMode value="NoPowerDown" />
<!-- NoRefresh, Rankwise, Bankwise -->
<RefreshPolicy value="Rankwise" />
<!-- 1: 1X, 2: 2X, 4: 4X (e.g., DDR4) -->
<RefreshMode value="1" />
<RefreshMaxPostponed value="8"/>
<RefreshMaxPulledin value="8"/>
<!-- NoPowerDown, Staggered, TimeoutPDN, TimeoutSREF -->
<PowerDownPolicy value="NoPowerDown" />
<PowerDownTimeout value="100" />
<!-- Bankwise -->
<BankwiseLogic value="0"/>
<!-- Refresh yes, no -->
<ControllerCoreRefDisable value="0"/>
<!-- Refresh Mode. 1: 1X, 2: 2X, 4: 4X (e.g., DDR4) -->
<ControllerCoreRefMode value="1"/>
<!-- Number of AR commands in a tREFI in 1X mode -->
<ControllerCoreRefNumARCmdsIntREFI value="8192"/>
<!-- RGR -->
<ControllerCoreRGR value="0"/>
<ControllerCoreRGRRowInc value="1"/>
<!-- Banks to be refreshed in RGR mode. 1: yes, 0: no (max. 16 banks) -->
<ControllerCoreRGRB0 value="1"/>
<ControllerCoreRGRB1 value="1"/>
<ControllerCoreRGRB2 value="1"/>
<ControllerCoreRGRB3 value="1"/>
<ControllerCoreRGRB4 value="1"/>
<ControllerCoreRGRB5 value="1"/>
<ControllerCoreRGRB6 value="1"/>
<ControllerCoreRGRB7 value="1"/>
<ControllerCoreRGRB8 value="0"/>
<ControllerCoreRGRB9 value="0"/>
<ControllerCoreRGRB10 value="0"/>
<ControllerCoreRGRB11 value="0"/>
<ControllerCoreRGRB12 value="0"/>
<ControllerCoreRGRB13 value="0"/>
<ControllerCoreRGRB14 value="0"/>
<ControllerCoreRGRB15 value="0"/>
<!-- Postpone, pull-in -->
<ControllerCoreRefEnablePostpone value="0"/>
<ControllerCoreRefEnablePullIn value="0"/>
<ControllerCoreRefMaxPostponed value="8"/>
<ControllerCoreRefMaxPulledIn value="8"/>
<ControllerCoreRefForceMaxPostponeBurst value="0"/>
</mcconfig>

47
DRAMSys/library/resources/configs/mcconfigs/fr_fcfs_grp.xml
View File

@@ -1,49 +1,20 @@
<mcconfig>
<MaxNrOfTransactions value="8" />
<!-- Open, OpenAdaptive, Closed, ClosedAdaptive -->
<PagePolicy value="Open" />
<!-- Fifo, FrFcfs, FrFcfsGrp -->
<Scheduler value="FrFcfsGrp" />
<RequestBufferSize value="8" />
<!-- Oldest, Strict -->
<CmdMux value="Oldest" />
<!-- Fifo, Reorder -->
<RespQueue value="Fifo" />
<Capsize value="5" />
<!-- 4 Modes: NoPowerDown, Staggered, TimeoutPDN, TimeoutSREF -->
<PowerDownMode value="NoPowerDown" />
<!-- NoRefresh, Rankwise, Bankwise -->
<RefreshPolicy value="Rankwise" />
<!-- 1: 1X, 2: 2X, 4: 4X (e.g., DDR4) -->
<RefreshMode value="1" />
<RefreshMaxPostponed value="8"/>
<RefreshMaxPulledin value="8"/>
<!-- NoPowerDown, Staggered, TimeoutPDN, TimeoutSREF -->
<PowerDownPolicy value="NoPowerDown" />
<PowerDownTimeout value="100" />
<!-- Bankwise -->
<BankwiseLogic value="0"/>
<!-- Refresh yes, no -->
<ControllerCoreRefDisable value="0"/>
<!-- Refresh Mode. 1: 1X, 2: 2X, 4: 4X (e.g., DDR4) -->
<ControllerCoreRefMode value="1"/>
<!-- Number of AR commands in a tREFI in 1X mode -->
<ControllerCoreRefNumARCmdsIntREFI value="8192"/>
<!-- RGR -->
<ControllerCoreRGR value="0"/>
<ControllerCoreRGRRowInc value="1"/>
<!-- Banks to be refreshed in RGR mode. 1: yes, 0: no (max. 16 banks) -->
<ControllerCoreRGRB0 value="1"/>
<ControllerCoreRGRB1 value="1"/>
<ControllerCoreRGRB2 value="1"/>
<ControllerCoreRGRB3 value="1"/>
<ControllerCoreRGRB4 value="1"/>
<ControllerCoreRGRB5 value="1"/>
<ControllerCoreRGRB6 value="1"/>
<ControllerCoreRGRB7 value="1"/>
<ControllerCoreRGRB8 value="0"/>
<ControllerCoreRGRB9 value="0"/>
<ControllerCoreRGRB10 value="0"/>
<ControllerCoreRGRB11 value="0"/>
<ControllerCoreRGRB12 value="0"/>
<ControllerCoreRGRB13 value="0"/>
<ControllerCoreRGRB14 value="0"/>
<ControllerCoreRGRB15 value="0"/>
<!-- Postpone, pull-in -->
<ControllerCoreRefEnablePostpone value="0"/>
<ControllerCoreRefEnablePullIn value="0"/>
<ControllerCoreRefMaxPostponed value="8"/>
<ControllerCoreRefMaxPulledIn value="8"/>
<ControllerCoreRefForceMaxPostponeBurst value="0"/>
</mcconfig>

12
DRAMSys/library/src/common/TlmRecorder.cpp
View File

@@ -337,18 +337,18 @@ void TlmRecorder::insertGeneralInfo()
memspec.length(), NULL);
sqlite3_bind_text(insertGeneralInfoStatement, 9, traces.c_str(),
traces.length(), NULL);
if (!Configuration::getInstance().EnableWindowing)
if (!Configuration::getInstance().enableWindowing)
sqlite3_bind_int64(insertGeneralInfoStatement, 10, 0);
else
sqlite3_bind_int64(insertGeneralInfoStatement, 10,
(Configuration::getInstance().memSpec->clk *
Configuration::getInstance().WindowSize).value());
if (Configuration::getInstance().ControllerCoreRefEnablePostpone
|| Configuration::getInstance().ControllerCoreRefEnablePullIn) {
Configuration::getInstance().windowSize).value());
if ((Configuration::getInstance().refreshMaxPostponed > 0)
|| (Configuration::getInstance().refreshMaxPulledin > 0)) {
sqlite3_bind_int(insertGeneralInfoStatement, 11, 1);
sqlite3_bind_int(insertGeneralInfoStatement, 12,
std::max(Configuration::getInstance().ControllerCoreRefMaxPulledIn,
Configuration::getInstance().ControllerCoreRefMaxPostponed));
std::max(Configuration::getInstance().refreshMaxPostponed,
Configuration::getInstance().refreshMaxPulledin));
} else {
sqlite3_bind_int(insertGeneralInfoStatement, 11, 0);
sqlite3_bind_int(insertGeneralInfoStatement, 12, 0);

235
DRAMSys/library/src/configuration/Configuration.cpp
View File

@@ -47,28 +47,6 @@ using namespace std;
string Configuration::memspecUri = "";
string Configuration::mcconfigUri = "";
bool string2bool(string s)
{
if (s.compare("0") == 0) {
return false;
} else if (s.compare("1") == 0) {
return true;
} else {
SC_REPORT_FATAL("Configuration", ("Could not convert to bool: " + s).c_str());
return false;
}
}
int string2int(string s)
{
return std::stoi(s);
}
unsigned long long string2ull(string s)
{
return std::stoull(s);
}
StorageMode string2StoreMode(string s)
{
if (s == "NoStorage")
@@ -83,34 +61,6 @@ StorageMode string2StoreMode(string s)
}
}
EPowerDownMode string2PDNMode(string s)
{
if (s == "NoPowerDown")
return EPowerDownMode::NoPowerDown;
else if (s == "Staggered")
return EPowerDownMode::Staggered;
else if (s == "TimeoutPDN")
return EPowerDownMode::TimeoutPDN;
else if (s == "TimeoutSREF")
return EPowerDownMode::TimeoutSREF;
else {
SC_REPORT_FATAL("Configuration", ("Unknown PowerDownMode: " + s).c_str());
throw;
}
}
ECCControllerMode string2ECCControllerMode(string s)
{
if (s == "Disabled")
return ECCControllerMode::Disabled;
else if (s == "Hamming")
return ECCControllerMode::Hamming;
else {
SC_REPORT_FATAL("Configuration", ("Unknown ECCControllerMode: " + s).c_str());
throw;
}
}
enum sc_time_unit string2TimeUnit(string s)
{
if (s == "s")
@@ -134,150 +84,81 @@ enum sc_time_unit string2TimeUnit(string s)
void Configuration::setParameter(std::string name, std::string value)
{
if (name == "BankwiseLogic")
BankwiseLogic = string2bool(value);
else if (name == "PagePolicy")
// MCConfig
if (name == "PagePolicy")
pagePolicy = value;
else if (name == "MaxNrOfTransactions")
MaxNrOfTransactions = string2int(value);
else if (name == "Scheduler")
scheduler = value;
else if (name == "RequestBufferSize")
requestBufferSize = std::stoul(value);
else if (name == "CmdMux")
cmdMux = value;
else if (name == "RespQueue")
respQueue = value;
else if (name == "SJFProbability")
{
if (string2int(value) > 100 || string2int(value) < 0)
SC_REPORT_FATAL("Configuration",
("Invalid value for parameter " + name +
". This parameter must be between 0 and 100.").c_str());
else
SJFProbability = string2int(value);
}
else if (name == "RequestBufferSize")
RequestBufferSize = string2int(value);
else if (name == "Capsize")
Capsize = string2int(value);
else if (name == "RefreshPolicy")
refreshPolicy = value;
else if (name == "RefreshMode")
refreshMode = std::stoul(value);
else if (name == "RefreshMaxPostponed")
refreshMaxPostponed = std::stoul(value);
else if (name == "RefreshMaxPulledin")
refreshMaxPulledin = std::stoul(value);
else if (name == "PowerDownPolicy")
powerDownPolicy = value;
else if (name == "PowerDownTimeout")
powerDownTimeoutInClk = string2int(value);
else if (name == "PowerDownMode")
PowerDownMode = string2PDNMode(value);
else if (name == "ReadWriteGrouping")
ReadWriteGrouping = string2bool(value);
else if (name == "ReorderBuffer")
ReorderBuffer = string2bool(value);
powerDownTimeout = std::stoul(value);
//SimConfig------------------------------------------------
else if (name == "SimulationName")
SimulationName = value;
simulationName = value;
else if (name == "DatabaseRecording")
DatabaseRecording = string2bool(value);
databaseRecording = std::stoul(value);
else if (name == "PowerAnalysis")
PowerAnalysis = string2bool(value);
powerAnalysis = std::stoul(value);
else if (name == "EnableWindowing")
EnableWindowing = string2bool(value);
enableWindowing = std::stoul(value);
else if (name == "WindowSize")
{
if (string2int(value) < 1)
windowSize = std::stoul(value);
if (windowSize == 0)
SC_REPORT_FATAL("Configuration",
("Invalid value for parameter " + name +
". This parameter must be at least one.").c_str());
else
WindowSize = string2int(value);
}
else if (name == "Debug")
Debug = string2bool(value);
debug = std::stoul(value);
else if (name == "NumberOfMemChannels")
NumberOfMemChannels = string2int(value);
else if (name == "ControllerCoreRefDisable")
ControllerCoreRefDisable = string2bool(value);
else if (name == "ControllerCoreRGR")
RowGranularRef = string2bool(value);
else if (name == "ControllerCoreRGRRowInc")
RowInc = string2int(value);
else if (name == "ControllerCoreRefMode")
{
RefMode = string2int(value);
if (RefMode != 1 && RefMode != 2 && RefMode != 4)
SC_REPORT_FATAL("Configuration", (name + " invalid value.").c_str());
}
else if (name == "ControllerCoreRefNumARCmdsIntREFI")
NumAR = string2int(value);
else if (name == "ControllerCoreRGRB0")
RGRB0 = string2bool(value);
else if (name == "ControllerCoreRGRB1")
RGRB1 = string2bool(value);
else if (name == "ControllerCoreRGRB2")
RGRB2 = string2bool(value);
else if (name == "ControllerCoreRGRB3")
RGRB3 = string2bool(value);
else if (name == "ControllerCoreRGRB4")
RGRB4 = string2bool(value);
else if (name == "ControllerCoreRGRB5")
RGRB5 = string2bool(value);
else if (name == "ControllerCoreRGRB6")
RGRB6 = string2bool(value);
else if (name == "ControllerCoreRGRB7")
RGRB7 = string2bool(value);
else if (name == "ControllerCoreRGRB8")
RGRB8 = string2bool(value);
else if (name == "ControllerCoreRGRB9")
RGRB9 = string2bool(value);
else if (name == "ControllerCoreRGRB10")
RGRB10 = string2bool(value);
else if (name == "ControllerCoreRGRB11")
RGRB11 = string2bool(value);
else if (name == "ControllerCoreRGRB12")
RGRB12 = string2bool(value);
else if (name == "ControllerCoreRGRB13")
RGRB13 = string2bool(value);
else if (name == "ControllerCoreRGRB14")
RGRB14 = string2bool(value);
else if (name == "ControllerCoreRGRB15")
RGRB15 = string2bool(value);
else if (name == "ControllerCoreRefForceMaxPostponeBurst")
ControllerCoreRefForceMaxPostponeBurst = string2bool(value);
else if (name == "ControllerCoreRefEnablePostpone")
ControllerCoreRefEnablePostpone = string2bool(value);
else if (name == "ControllerCoreRefEnablePullIn")
ControllerCoreRefEnablePullIn = string2bool(value);
else if (name == "ControllerCoreRefMaxPostponed")
ControllerCoreRefMaxPostponed = string2int(value);
else if (name == "ControllerCoreRefMaxPulledIn")
ControllerCoreRefMaxPulledIn = string2int(value);
numberOfMemChannels = std::stoul(value);
else if (name == "ThermalSimulation")
ThermalSimulation = string2bool(value);
thermalSimulation = std::stoul(value);
else if (name == "SimulationProgressBar")
SimulationProgressBar = string2bool(value);
simulationProgressBar = std::stoul(value);
else if (name == "NumberOfDevicesOnDIMM")
{
if (string2int(value) < 1)
numberOfDevicesOnDIMM = std::stoul(value);
if (numberOfDevicesOnDIMM == 0)
SC_REPORT_FATAL("Configuration",
("Invalid value for parameter " + name +
". This parameter must be at least one.").c_str());
else
NumberOfDevicesOnDIMM = string2int(value);
}
else if (name == "AddressOffset")
{
#ifdef DRAMSYS_GEM5
AddressOffset = string2ull(value);
addressOffset = std::stoull(value);
#else
AddressOffset = 0;
addressOffset = 0;
#endif
}
else if (name == "UseMalloc")
UseMalloc = string2bool(value);
useMalloc = std::stoul(value);
else if (name == "CheckTLM2Protocol")
CheckTLM2Protocol = string2bool(value);
checkTLM2Protocol = std::stoul(value);
else if (name == "ECCControllerMode")
ECCMode = string2ECCControllerMode(value);
ECCMode = value;
// Specification for ErrorChipSeed, ErrorCSVFile path and StoreMode
else if (name == "ErrorChipSeed")
ErrorChipSeed = string2int(value);
errorChipSeed = std::stoul(value);
else if (name == "ErrorCSVFile")
ErrorCSVFile = value;
errorCSVFile = value;
else if (name == "StoreMode")
StoreMode = string2StoreMode(value);
// Temperature Simulation related
@@ -289,7 +170,7 @@ void Configuration::setParameter(std::string name, std::string value)
temperatureSim.TemperatureScale = value;
}
else if (name == "StaticTemperatureDefaultValue")
temperatureSim.StaticTemperatureDefaultValue = string2int(value);
temperatureSim.StaticTemperatureDefaultValue = std::stoi(value);
else if (name == "ThermalSimPeriod")
temperatureSim.ThermalSimPeriod = std::stod(value.c_str());
else if (name == "ThermalSimUnit")
@@ -302,15 +183,15 @@ void Configuration::setParameter(std::string name, std::string value)
else if (name == "IceServerIp")
temperatureSim.IceServerIp = value;
else if (name == "IceServerPort")
temperatureSim.IceServerPort = string2int(value);
temperatureSim.IceServerPort = std::stoul(value);
else if (name == "SimPeriodAdjustFactor")
temperatureSim.SimPeriodAdjustFactor = std::stoi(value.c_str());
else if (name == "NPowStableCyclesToIncreasePeriod")
temperatureSim.NPowStableCyclesToIncreasePeriod = std::stoi(value.c_str());
else if (name == "GenerateTemperatureMap")
temperatureSim.GenerateTemperatureMap = string2bool(value);
temperatureSim.GenerateTemperatureMap = std::stoul(value);
else if (name == "GeneratePowerMap")
temperatureSim.GeneratePowerMap = string2bool(value);
temperatureSim.GeneratePowerMap = std::stoul(value);
else
SC_REPORT_FATAL("Configuration",
("Parameter " + name + " not defined in Configuration").c_str());
@@ -351,7 +232,7 @@ std::uint64_t Configuration::getSimMemSizeInBytes()
// 3. Calculate size of one DRAM chip in bytes
std::uint64_t chipSize = chipBitSize / 8;
// 4. Total memory size in Bytes of one DIMM (with only support of 1 rank on a DIMM)
std::uint64_t memorySize = chipSize * NumberOfDevicesOnDIMM;
std::uint64_t memorySize = chipSize * numberOfDevicesOnDIMM;
std::cout << headline << std::endl;
std::cout << "Per Channel Configuration:" << std::endl << std::endl;
@@ -365,7 +246,7 @@ std::uint64_t Configuration::getSimMemSizeInBytes()
std::cout << " Chip data bus width: " << bitWidth << std::endl;
std::cout << " Chip size in bits: " << chipBitSize << std::endl;
std::cout << " Chip Size in bytes: " << chipSize << std::endl;
std::cout << " Devices/Chips on DIMM: " << NumberOfDevicesOnDIMM << std::endl;
std::cout << " Devices/Chips on DIMM: " << numberOfDevicesOnDIMM << std::endl;
std::cout << std::endl;
assert(memorySize > 0);
@@ -378,7 +259,7 @@ std::uint64_t Configuration::getSimMemSizeInBytes()
// The bus width is given in bits, e.g., 64-bit data bus, 128-bit data bus, etc.
unsigned int Configuration::getDataBusWidth()
{
unsigned int dataBusWidth = memSpec->bitWidth * NumberOfDevicesOnDIMM;
unsigned int dataBusWidth = memSpec->bitWidth * numberOfDevicesOnDIMM;
assert(dataBusWidth > 0);
return dataBusWidth;
}
@@ -390,7 +271,7 @@ unsigned int Configuration::getBytesPerBurst()
unsigned int bytesPerBurst = (memSpec->BurstLength * getDataBusWidth()) / 8;
assert(bytesPerBurst > 0);
if (NumberOfDevicesOnDIMM > 1) {
if (numberOfDevicesOnDIMM > 1) {
// The least significant bits of the physical address are the byte
// offset of the N-byte-wide memory module (DIMM) (a single data word
// or burst element has N bytes. N = 2^(# bits for byte offset)).
@@ -402,36 +283,20 @@ unsigned int Configuration::getBytesPerBurst()
return bytesPerBurst;
}
bool Configuration::getRGRBank(unsigned int w)
{
bool flg = w == 0 ? RGRB0 : w == 1 ? RGRB1 : w == 2 ? RGRB2 : w == 3 ? RGRB3 : w
== 4 ? RGRB4 : w == 5 ? RGRB5 : w == 6 ? RGRB6 : w == 7 ? RGRB7 : w == 8 ? RGRB8
: w == 9 ? RGRB9 : w == 10 ? RGRB10 : w == 11 ? RGRB11 : w == 12 ? RGRB12 : w ==
13 ? RGRB13 : w == 14 ? RGRB14 : w == 15 ? RGRB15 : true;
return flg;
}
unsigned int Configuration::getNumAR(void)
{
return NumAR;
}
unsigned int Configuration::getRowInc(void)
{
return RowInc;
}
unsigned int Configuration::getRefMode(void)
{
return RefMode;
}
// Changes the number of bytes depeding on the ECC Controller. This function is needed for modules which get data directly or indirectly from the ECC Controller
unsigned int Configuration::adjustNumBytesAfterECC(unsigned nBytes)
{
// Manipulate the number of bytes only if there is an ECC Controller selected
if (ECCMode == ECCControllerMode::Disabled)
if (ECCMode == "Disabled")
return nBytes;
else {
else if (ECCMode == "Hamming")
{
assert(pECC != nullptr);
return pECC->AllocationSize(nBytes);
}
else
{
SC_REPORT_FATAL("Configuration", ("ECC mode " + ECCMode + " unsupported").c_str());
return 0;
}
}

96
DRAMSys/library/src/configuration/Configuration.h
View File

@@ -50,10 +50,6 @@
enum class StorageMode {NoStorage, Store, ErrorModel};
enum class EPowerDownMode {NoPowerDown, Staggered, TimeoutPDN, TimeoutSREF};
enum class ECCControllerMode {Disabled, Hamming};
struct Configuration
{
static std::string memspecUri;
@@ -63,68 +59,34 @@ struct Configuration
DEF_SINGLETON(Configuration);
// MCConfig:
bool BankwiseLogic = false;
unsigned int MaxNrOfTransactions = 8;
std::string pagePolicy;
std::string scheduler, cmdMux, respQueue;
unsigned int SJFProbability;
unsigned int RequestBufferSize;
unsigned int Capsize = 5;
sc_time getPowerDownTimeout()
{
return powerDownTimeoutInClk * memSpec->clk;
}
EPowerDownMode PowerDownMode = EPowerDownMode::Staggered;
bool ReadWriteGrouping = false;
bool ReorderBuffer = false;
std::string pagePolicy = "Open";
std::string scheduler = "Fifo";
std::string cmdMux = "Oldest";
std::string respQueue = "Fifo";
unsigned int requestBufferSize = 8;
std::string refreshPolicy = "Rankwise";
unsigned int refreshMode = 1;
unsigned int refreshMaxPostponed = 0;
unsigned int refreshMaxPulledin = 0;
std::string powerDownPolicy = "NoPowerDown";
unsigned int powerDownTimeout = 3;
// SimConfig
std::string SimulationName = "default";
bool DatabaseRecording = true;
bool PowerAnalysis = false;
bool EnableWindowing = false;
unsigned int WindowSize = 1000;
bool Debug = false;
unsigned int NumberOfMemChannels = 1;
bool ControllerCoreRefDisable = false;
bool RowGranularRef = false;
bool RGRB0 = true;
bool RGRB1 = true;
bool RGRB2 = true;
bool RGRB3 = true;
bool RGRB4 = true;
bool RGRB5 = true;
bool RGRB6 = true;
bool RGRB7 = true;
bool RGRB8 = true;
bool RGRB9 = true;
bool RGRB10 = true;
bool RGRB11 = true;
bool RGRB12 = true;
bool RGRB13 = true;
bool RGRB14 = true;
bool RGRB15 = true;
unsigned int NumAR = 8192;
unsigned int RefMode = 1;
unsigned int RowInc = 1;
bool getRGRBank(unsigned int);
unsigned int getNumAR(void);
unsigned int getRowInc(void);
unsigned int getRefMode(void);
bool ControllerCoreRefForceMaxPostponeBurst = false;
bool ControllerCoreRefEnablePostpone = false;
bool ControllerCoreRefEnablePullIn = false;
unsigned int ControllerCoreRefMaxPostponed = 8;
unsigned int ControllerCoreRefMaxPulledIn = 8;
bool ThermalSimulation = false;
bool SimulationProgressBar = false;
unsigned int NumberOfDevicesOnDIMM = 1;
bool CheckTLM2Protocol = false;
ECCControllerMode ECCMode = ECCControllerMode::Disabled;
std::string simulationName = "default";
bool databaseRecording = false;
bool powerAnalysis = false;
bool enableWindowing = false;
unsigned int windowSize = 1000;
bool debug = false;
unsigned int numberOfMemChannels = 1;
bool thermalSimulation = false;
bool simulationProgressBar = false;
unsigned int numberOfDevicesOnDIMM = 8;
bool checkTLM2Protocol = false;
std::string ECCMode = "Disabled";
ECCBaseClass *pECC = nullptr;
bool gem5 = false;
bool UseMalloc = false;
unsigned long long int AddressOffset = 0;
bool useMalloc = false;
unsigned long long int addressOffset = 0;
// MemSpec (from DRAM-Power XML)
MemSpec *memSpec;
@@ -133,8 +95,8 @@ struct Configuration
void setParameters(std::map<std::string, std::string> parameterMap);
//Configs for Seed, csv file and StorageMode
unsigned int ErrorChipSeed;
std::string ErrorCSVFile = "not defined.";
unsigned int errorChipSeed;
std::string errorCSVFile = "not defined.";
StorageMode StoreMode;
// Temperature Simulation related
@@ -146,10 +108,6 @@ struct Configuration
unsigned int adjustNumBytesAfterECC(unsigned bytes);
void setPathToResources(std::string path);
std::string getPathToResources();
private:
Configuration() {}
unsigned int powerDownTimeoutInClk = 3;
};
#endif // CONFIGURATION_H

8
DRAMSys/library/src/configuration/ConfigurationLoader.cpp
View File

@@ -318,18 +318,18 @@ void ConfigurationLoader::loadDDR4(Configuration &config, XMLElement *xmlSpec)
memSpec->tCCD_S = clk * queryUIntParameter(timings, "CCD_S");
memSpec->tCCD_L = clk * queryUIntParameter(timings, "CCD_L");
memSpec->tFAW = clk * queryUIntParameter(timings, "FAW");
unsigned refMode = Configuration::getInstance().getRefMode();
if (refMode == 1)
unsigned refreshMode = Configuration::getInstance().refreshMode;
if (refreshMode == 1)
{
memSpec->tREFI = clk * queryUIntParameter(timings, "REFI");
memSpec->tRFC = clk * queryUIntParameter(timings, "RFC");
}
else if (refMode == 2)
else if (refreshMode == 2)
{
memSpec->tREFI = clk * (queryUIntParameter(timings, "REFI") / 2);
memSpec->tRFC = clk * queryUIntParameter(timings, "RFC2");
}
else if (refMode == 4)
else if (refreshMode == 4)
{
memSpec->tREFI = clk * (queryUIntParameter(timings, "REFI") / 2);
memSpec->tRFC = clk * queryUIntParameter(timings, "RFC4");

38
DRAMSys/library/src/controller/Controller.cpp
View File

@@ -53,7 +53,7 @@
#include "cmdmux/CmdMuxOldest.h"
#include "respqueue/RespQueueFifo.h"
#include "respqueue/RespQueueReorder.h"
#include "refresh/RefreshManager.h"
#include "refresh/RefreshManagerRankwise.h"
#include "refresh/RefreshManagerDummy.h"
#include "refresh/RefreshManagerBankwise.h"
#include "powerdown/PowerDownManagerStaggered.h"
@@ -103,9 +103,9 @@ Controller::Controller(sc_module_name name) :
SC_REPORT_FATAL("Controller", "Selected scheduler not supported!");
if (config.cmdMux == "Oldest")
commandMux = new CmdMuxOldest();
cmdMux = new CmdMuxOldest();
else if (config.cmdMux == "Strict")
commandMux = new CmdMuxStrict();
cmdMux = new CmdMuxStrict();
else
SC_REPORT_FATAL("Controller", "Selected cmdmux not supported!");
@@ -147,7 +147,7 @@ Controller::Controller(sc_module_name name) :
}
// instantiate power-down managers (one per rank)
if (config.PowerDownMode == EPowerDownMode::NoPowerDown)
if (config.powerDownPolicy == "NoPowerDown")
{
for (unsigned rankID = 0; rankID < memSpec->NumberOfRanks; rankID++)
{
@@ -155,7 +155,7 @@ Controller::Controller(sc_module_name name) :
powerDownManagers.push_back(manager);
}
}
else if (config.PowerDownMode == EPowerDownMode::Staggered)
else if (config.powerDownPolicy == "Staggered")
{
for (unsigned rankID = 0; rankID < memSpec->NumberOfRanks; rankID++)
{
@@ -169,12 +169,22 @@ Controller::Controller(sc_module_name name) :
SC_REPORT_FATAL("Controller", "Selected power-down mode not supported!");
// instantiate refresh managers (one per rank)
if (config.ControllerCoreRefDisable)
if (config.refreshPolicy == "NoRefresh")
{
for (unsigned rankID = 0; rankID < memSpec->NumberOfRanks; rankID++)
refreshManagers.push_back(new RefreshManagerDummy());
}
else if (config.BankwiseLogic)
else if (config.refreshPolicy == "Rankwise")
{
for (unsigned rankID = 0; rankID < memSpec->NumberOfRanks; rankID++)
{
RefreshManagerIF *manager = new RefreshManagerRankwise
(bankMachinesOnRank[rankID], powerDownManagers[rankID], Rank(rankID), checker);
refreshManagers.push_back(manager);
controllerEvent.notify(manager->start());
}
}
else if (config.refreshPolicy == "Bankwise")
{
for (unsigned rankID = 0; rankID < memSpec->NumberOfRanks; rankID++)
{
@@ -186,15 +196,7 @@ Controller::Controller(sc_module_name name) :
}
}
else
{
for (unsigned rankID = 0; rankID < memSpec->NumberOfRanks; rankID++)
{
RefreshManagerIF *manager = new RefreshManager
(bankMachinesOnRank[rankID], powerDownManagers[rankID], Rank(rankID), checker);
refreshManagers.push_back(manager);
controllerEvent.notify(manager->start());
}
}
SC_REPORT_FATAL("Controller", "Selected refresh mode not supported!");
startBandwidthIdleCollector();
}
@@ -210,7 +212,7 @@ Controller::~Controller()
delete it;
for (auto it : bankMachines)
delete it;
delete commandMux;
delete cmdMux;
delete scheduler;
delete checker;
}
@@ -289,7 +291,7 @@ void Controller::controllerMethod()
bool readyCmdBlocked = false;
if (!readyCommands.empty())
{
commandPair = commandMux->selectCommand(readyCommands);
commandPair = cmdMux->selectCommand(readyCommands);
if (commandPair.second != nullptr) // can happen with FIFO strict
{
Rank rank = DramExtension::getRank(commandPair.second);

2
DRAMSys/library/src/controller/Controller.h
View File

@@ -87,7 +87,7 @@ private:
std::vector<BankMachine *> bankMachines;
std::vector<std::vector<BankMachine *>> bankMachinesOnRank;
CmdMuxIF *commandMux;
CmdMuxIF *cmdMux;
SchedulerIF *scheduler;
CheckerIF *checker;
RespQueueIF *respQueue;

2
DRAMSys/library/src/controller/GenericController.h
View File

@@ -37,7 +37,7 @@ public:
// BusWidth e.g. 8 or 64
* Configuration::getInstance().memSpec->bitWidth
// Number of devices on a DIMM e.g. 8
* Configuration::getInstance().NumberOfDevicesOnDIMM ) / ( 1024 );
* Configuration::getInstance().numberOfDevicesOnDIMM ) / ( 1024 );
std::cout << name() << std::string(" Total Time: ")
<< sc_time_stamp().to_string()

6
DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp
View File

@@ -53,10 +53,8 @@ RefreshManagerBankwise::RefreshManagerBankwise(std::vector<BankMachine *> &bankM
}
remainingBankMachines = allBankMachines;
if (config.ControllerCoreRefEnablePostpone)
maxPostponed = config.ControllerCoreRefMaxPostponed * memSpec->BanksPerRank;
if (config.ControllerCoreRefEnablePullIn)
maxPulledin = -(config.ControllerCoreRefMaxPulledIn * memSpec->BanksPerRank);
maxPostponed = config.refreshMaxPostponed * memSpec->BanksPerRank;
maxPulledin = -(config.refreshMaxPulledin * memSpec->BanksPerRank);
}
std::pair<Command, tlm_generic_payload *> RefreshManagerBankwise::getNextCommand()

20
DRAMSys/library/src/controller/refresh/RefreshManager.cpp → DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.cpp
View File

@@ -32,12 +32,12 @@
* Author: Lukas Steiner
*/
#include "RefreshManager.h"
#include "RefreshManagerRankwise.h"
#include "../../common/dramExtensions.h"
#include "../../configuration/Configuration.h"
#include "../../common/utils.h"
RefreshManager::RefreshManager(std::vector<BankMachine *> &bankMachines,
RefreshManagerRankwise::RefreshManagerRankwise(std::vector<BankMachine *> &bankMachines,
PowerDownManagerIF *powerDownManager, Rank rank, CheckerIF *checker)
: bankMachines(bankMachines), powerDownManager(powerDownManager), rank(rank), checker(checker)
{
@@ -46,23 +46,21 @@ RefreshManager::RefreshManager(std::vector<BankMachine *> &bankMachines,
timeForNextTrigger = memSpec->getRefreshIntervalAB();
setUpDummy(refreshPayload, rank);
if (config.ControllerCoreRefEnablePostpone)
maxPostponed = config.ControllerCoreRefMaxPostponed;
if (config.ControllerCoreRefEnablePullIn)
maxPulledin = -config.ControllerCoreRefMaxPulledIn;
maxPostponed = config.refreshMaxPostponed;
maxPulledin = -config.refreshMaxPulledin;
}
void RefreshManager::notifyActive()
void RefreshManagerRankwise::notifyActive()
{
controllerIdle = false;
}
void RefreshManager::notifyIdle()
void RefreshManagerRankwise::notifyIdle()
{
controllerIdle = true;
}
std::pair<Command, tlm_generic_payload *> RefreshManager::getNextCommand()
std::pair<Command, tlm_generic_payload *> RefreshManagerRankwise::getNextCommand()
{
if (sc_time_stamp() == timeToSchedule)
return std::pair<Command, tlm_generic_payload *>(nextCommand, &refreshPayload);
@@ -70,7 +68,7 @@ std::pair<Command, tlm_generic_payload *> RefreshManager::getNextCommand()
return std::pair<Command, tlm_generic_payload *>(Command::NOP, nullptr);
}
sc_time RefreshManager::start()
sc_time RefreshManagerRankwise::start()
{
timeToSchedule = sc_max_time();
@@ -131,7 +129,7 @@ sc_time RefreshManager::start()
return timeForNextTrigger;
}
void RefreshManager::updateState(Command command, tlm_generic_payload *)
void RefreshManagerRankwise::updateState(Command command, tlm_generic_payload *)
{
if (command == Command::ACT)
activatedBanks++;

10
DRAMSys/library/src/controller/refresh/RefreshManager.h → DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.h
View File

@@ -32,8 +32,8 @@
* Author: Lukas Steiner
*/
#ifndef REFRESHMANAGER_H
#define REFRESHMANAGER_H
#ifndef REFRESHMANAGERRANKWISE_H
#define REFRESHMANAGERRANKWISE_H
#include "RefreshManagerIF.h"
#include "../../configuration/memspec/MemSpec.h"
@@ -43,10 +43,10 @@
using namespace tlm;
class RefreshManager final : public RefreshManagerIF
class RefreshManagerRankwise final : public RefreshManagerIF
{
public:
RefreshManager(std::vector<BankMachine *> &, PowerDownManagerIF *, Rank, CheckerIF *);
RefreshManagerRankwise(std::vector<BankMachine *> &, PowerDownManagerIF *, Rank, CheckerIF *);
virtual std::pair<Command, tlm_generic_payload *> getNextCommand() override;
virtual sc_time start() override;
@@ -77,4 +77,4 @@ private:
bool sleeping = false;
};
#endif // REFRESHMANAGER_H
#endif // REFRESHMANAGERRANKWISE_H

4
DRAMSys/library/src/controller/scheduler/SchedulerFifo.cpp
View File

@@ -38,12 +38,12 @@ SchedulerFifo::SchedulerFifo()
{
buffer = std::vector<std::deque<tlm_generic_payload *>>
(Configuration::getInstance().memSpec->NumberOfBanks);
maxNumberOfRequests = Configuration::getInstance().MaxNrOfTransactions;
requestBufferSize = Configuration::getInstance().requestBufferSize;
}
bool SchedulerFifo::hasBufferSpace(tlm_generic_payload *payload)
{
if (buffer[DramExtension::getBank(payload).ID()].size() < maxNumberOfRequests)
if (buffer[DramExtension::getBank(payload).ID()].size() < requestBufferSize)
return true;
else
return false;

2
DRAMSys/library/src/controller/scheduler/SchedulerFifo.h
View File

@@ -56,7 +56,7 @@ public:
virtual bool hasFurtherRequest(Bank) override;
private:
std::vector<std::deque<tlm_generic_payload *>> buffer;
unsigned maxNumberOfRequests;
unsigned requestBufferSize;
};
#endif // SCHEDULERFIFO_H

4
DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.cpp
View File

@@ -40,12 +40,12 @@ SchedulerFrFcfs::SchedulerFrFcfs()
{
buffer = std::vector<std::list<tlm_generic_payload *>>
(Configuration::getInstance().memSpec->NumberOfBanks);
maxNumberOfRequests = Configuration::getInstance().MaxNrOfTransactions;
requestBufferSize = Configuration::getInstance().requestBufferSize;
}
bool SchedulerFrFcfs::hasBufferSpace(tlm_generic_payload *payload)
{
if (buffer[DramExtension::getBank(payload).ID()].size() < maxNumberOfRequests)
if (buffer[DramExtension::getBank(payload).ID()].size() < requestBufferSize)
return true;
else
return false;

2
DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.h
View File

@@ -56,7 +56,7 @@ public:
virtual bool hasFurtherRequest(Bank) override;
private:
std::vector<std::list<tlm_generic_payload *>> buffer;
unsigned maxNumberOfRequests;
unsigned requestBufferSize;
};
#endif // SCHEDULERFRFCFS_H

4
DRAMSys/library/src/controller/scheduler/SchedulerFrFcfsGrp.cpp
View File

@@ -38,12 +38,12 @@ SchedulerFrFcfsGrp::SchedulerFrFcfsGrp()
{
buffer = std::vector<std::list<tlm_generic_payload *>>
(Configuration::getInstance().memSpec->NumberOfBanks);
maxNumberOfRequests = Configuration::getInstance().MaxNrOfTransactions;
requestBufferSize = Configuration::getInstance().requestBufferSize;
}
bool SchedulerFrFcfsGrp::hasBufferSpace(tlm_generic_payload *payload)
{
if (buffer[DramExtension::getBank(payload).ID()].size() < maxNumberOfRequests)
if (buffer[DramExtension::getBank(payload).ID()].size() < requestBufferSize)
return true;
else
return false;

2
DRAMSys/library/src/controller/scheduler/SchedulerFrFcfsGrp.h
View File

@@ -57,7 +57,7 @@ public:
virtual bool hasFurtherRequest(Bank) override;
private:
std::vector<std::list<tlm_generic_payload *>> buffer;
unsigned maxNumberOfRequests;
unsigned requestBufferSize;
tlm_command lastCommand = TLM_READ_COMMAND;
};

6
DRAMSys/library/src/error/errormodel.cpp
View File

@@ -43,8 +43,8 @@
void errorModel::init()
{
powerAnalysis = Configuration::getInstance().PowerAnalysis;
thermalSim = Configuration::getInstance().ThermalSimulation;
powerAnalysis = Configuration::getInstance().powerAnalysis;
thermalSim = Configuration::getInstance().thermalSimulation;
// Get Configuration parameters:
burstLenght = Configuration::getInstance().memSpec->BurstLength;
numberOfColumns = Configuration::getInstance().memSpec->NumberOfColumns;
@@ -514,7 +514,7 @@ double errorModel::getTemperature()
void errorModel::parseInputData()
{
std::string fileName = Configuration::getInstance().ErrorCSVFile;
std::string fileName = Configuration::getInstance().errorCSVFile;
std::ifstream inputFile(fileName);
if (inputFile.is_open()) {

8
DRAMSys/library/src/simulation/Arbiter.cpp
View File

@@ -48,7 +48,7 @@ Arbiter::Arbiter(sc_module_name name) :
// Anytime an transaction comes from a memory unity to the arbiter the "bw" callback is called.
iSocket.register_nb_transport_bw(this, &Arbiter::nb_transport_bw);
for (size_t i = 0; i < Configuration::getInstance().NumberOfMemChannels; ++i)
for (size_t i = 0; i < Configuration::getInstance().numberOfMemChannels; ++i)
{
channelIsFree.push_back(true);
pendingRequests.push_back(queue<tlm_generic_payload *>());
@@ -74,7 +74,7 @@ tlm_sync_enum Arbiter::nb_transport_fw(int id, tlm_generic_payload &payload,
{
// adjust address offset:
payload.set_address(payload.get_address() -
Configuration::getInstance().AddressOffset);
Configuration::getInstance().addressOffset);
// In the begin request phase the socket ID is appended to the payload.
// It will extracted from the payload and used later.
@@ -112,7 +112,7 @@ unsigned int Arbiter::transport_dbg(int /*id*/, tlm::tlm_generic_payload &trans)
{
// adjust address offset:
trans.set_address(trans.get_address() -
Configuration::getInstance().AddressOffset);
Configuration::getInstance().addressOffset);
DecodedAddress decodedAddress = AddressDecoder::getInstance().decodeAddress(
trans.get_address());
@@ -127,7 +127,7 @@ void Arbiter::peqCallback(tlm_generic_payload &payload, const tlm_phase &phase)
// Check the valid range of initiatorSocket ID and channel Id
// TODO: initiatorSocket ID not checked
assert(channelId < Configuration::getInstance().NumberOfMemChannels);
assert(channelId < Configuration::getInstance().numberOfMemChannels);
// Phases initiated by the intiator side from arbiter's point of view (devices performing memory requests to the arbiter)
if (phase == BEGIN_REQ)

44
DRAMSys/library/src/simulation/DRAMSys.cpp
View File

@@ -134,12 +134,12 @@ DRAMSys::DRAMSys(sc_module_name name,
AddressDecoder::getInstance().print();
// Setup the debug manager:
setupDebugManager(Configuration::getInstance().SimulationName);
setupDebugManager(Configuration::getInstance().simulationName);
// If a simulation file is passed as argument to DRAMSys the simulation ID
// is prepended to the simulation name if found.
std::string simName;
simName = Configuration::getInstance().SimulationName;
simName = Configuration::getInstance().simulationName;
tinyxml2::XMLDocument simulationdoc;
loadXML(simulationToRun, simulationdoc);
tinyxml2::XMLElement *simulation =
@@ -151,7 +151,7 @@ DRAMSys::DRAMSys(sc_module_name name,
if (r != NULL) {
std::string sid;
sid = r;
simName = sid + '_' + Configuration::getInstance().SimulationName;
simName = sid + '_' + Configuration::getInstance().simulationName;
}
}
}
@@ -196,7 +196,7 @@ void DRAMSys::setupTlmRecorders(const string &traceName,
{
// Create TLM Recorders, one per channel.
for (size_t i = 0;
i < Configuration::getInstance().NumberOfMemChannels;
i < Configuration::getInstance().numberOfMemChannels;
i++) {
std::string sqlScriptURI = pathToResources
+ string("scripts/createTraceDB.sql");
@@ -213,7 +213,7 @@ void DRAMSys::setupTlmRecorders(const string &traceName,
tlmRecorder->recordMCconfig(Configuration::getInstance().mcconfigUri);
tlmRecorder->recordMemspec(Configuration::getInstance().memspecUri);
std::string traceNames = Configuration::getInstance().SimulationName;
std::string traceNames = Configuration::getInstance().simulationName;
tlmRecorder->recordTracenames(traceNames);
tlmRecorders.push_back(tlmRecorder);
@@ -229,19 +229,17 @@ void DRAMSys::instantiateModules(const string &traceName,
// Create and properly initialize TLM recorders.
// They need to be ready before creating some modules.
bool recordingEnabled = Configuration::getInstance().DatabaseRecording;
bool recordingEnabled = Configuration::getInstance().databaseRecording;
if (recordingEnabled)
setupTlmRecorders(traceName, pathToResources);
// Create new ECC Controller
switch (Configuration::getInstance().ECCMode) {
case ECCControllerMode::Hamming:
if (Configuration::getInstance().ECCMode == "Hamming")
ecc = new ECCHamming("ECCHamming");
break;
default:
else if (Configuration::getInstance().ECCMode == "Disabled")
ecc = nullptr;
break;
}
else
SC_REPORT_FATAL("DRAMSys", "Unsupported ECC mode");
// Save ECC Controller into the configuration struct to adjust it dynamically
Configuration::getInstance().pECC = ecc;
@@ -251,7 +249,7 @@ void DRAMSys::instantiateModules(const string &traceName,
// Create DRAM
std::string memoryType = Configuration::getInstance().memSpec->MemoryType;
for (size_t i = 0; i < Configuration::getInstance().NumberOfMemChannels; i++)
for (size_t i = 0; i < Configuration::getInstance().numberOfMemChannels; i++)
{
std::string str = "controller" + std::to_string(i);
@@ -329,12 +327,11 @@ void DRAMSys::instantiateModules(const string &traceName,
dram = new DramGDDR6(str.c_str());
}
else
{
SC_REPORT_FATAL("DRAMSys", "Unsupported DRAM type");
}
drams.push_back(dram);
if (Configuration::getInstance().CheckTLM2Protocol) {
if (Configuration::getInstance().checkTLM2Protocol) {
str = "TLMCheckerController" + std::to_string(i);
tlm_utils::tlm2_base_protocol_checker<> *controllerTlmChecker =
new tlm_utils::tlm2_base_protocol_checker<>(str.c_str());
@@ -346,17 +343,20 @@ void DRAMSys::instantiateModules(const string &traceName,
void DRAMSys::bindSockets()
{
// If ECC Controller enabled, put it between Trace and arbiter
if (Configuration::getInstance().ECCMode != ECCControllerMode::Disabled) {
if (Configuration::getInstance().ECCMode == "Hamming")
{
assert(ecc != nullptr);
tSocket.bind(ecc->t_socket);
ecc->i_socket.bind(arbiter->tSocket);
} else {
tSocket.bind(arbiter->tSocket);
}
else if (Configuration::getInstance().ECCMode == "Disabled")
tSocket.bind(arbiter->tSocket);
else
SC_REPORT_FATAL("DRAMSys", "Unsupported ECC mode");
if (Configuration::getInstance().CheckTLM2Protocol) {
if (Configuration::getInstance().checkTLM2Protocol) {
for (size_t i = 0;
i < Configuration::getInstance().NumberOfMemChannels;
i < Configuration::getInstance().numberOfMemChannels;
i++) {
arbiter->iSocket.bind(controllersTlmCheckers[i]->target_socket);
controllersTlmCheckers[i]->initiator_socket.bind(
@@ -365,7 +365,7 @@ void DRAMSys::bindSockets()
}
} else {
for (size_t i = 0;
i < Configuration::getInstance().NumberOfMemChannels;
i < Configuration::getInstance().numberOfMemChannels;
i++) {
arbiter->iSocket.bind(controllers[i]->tSocket);
controllers[i]->iSocket.bind(drams[i]->tSocket);

2
DRAMSys/library/src/simulation/TemperatureController.h
View File

@@ -61,7 +61,7 @@ public:
SC_CTOR(TemperatureController) {
temperatureScale = Configuration::getInstance().temperatureSim.TemperatureScale;
dynamicTempSimEnabled = Configuration::getInstance().ThermalSimulation;
dynamicTempSimEnabled = Configuration::getInstance().thermalSimulation;
staticTemperature =
Configuration::getInstance().temperatureSim.StaticTemperatureDefaultValue;

2
DRAMSys/library/src/simulation/TracePlayer.cpp
View File

@@ -85,7 +85,7 @@ void TracePlayer::peqCallback(tlm_generic_payload &payload,
} else if (phase == BEGIN_RESP) {
payload.release();
sendToTarget(payload, END_RESP, SC_ZERO_TIME);
if (Configuration::getInstance().SimulationProgressBar)
if (Configuration::getInstance().simulationProgressBar)
listener->transactionFinished();
transactionsReceived++;

2
DRAMSys/library/src/simulation/TraceSetup.cpp
View File

@@ -97,7 +97,7 @@ traceSetup::traceSetup(std::string uri,
}
devices->push_back(player);
if (Configuration::getInstance().SimulationProgressBar) {
if (Configuration::getInstance().simulationProgressBar) {
totalTransactions += player->getNumberOfLines(stlFile);
}
}

12
DRAMSys/library/src/simulation/dram/Dram.cpp
View File

@@ -73,7 +73,7 @@ Dram::Dram(sc_module_name name) : sc_module(name), tSocket("socket")
uint64_t memorySize = Configuration::getInstance().getSimMemSizeInBytes();
if (StoreMode == StorageMode::Store)
{
if (Configuration::getInstance().UseMalloc)
if (Configuration::getInstance().useMalloc)
{
memory = (unsigned char *)malloc(memorySize);
if (!memory)
@@ -97,13 +97,13 @@ Dram::Dram(sc_module_name name) : sc_module(name), tSocket("socket")
Dram::~Dram()
{
if (Configuration::getInstance().PowerAnalysis)
if (Configuration::getInstance().powerAnalysis)
{
libDRAMPower *DRAMPower = dynamic_cast<libDRAMPower *>(this->DRAMPower);
if (DRAMPower == nullptr)
SC_REPORT_FATAL("Dram", "Power Analysis active but libDRAMPowerIF instantiated");
if (!Configuration::getInstance().DatabaseRecording)
if (!Configuration::getInstance().databaseRecording)
DRAMPower->calcEnergy();
// Print the final total energy and the average power for
@@ -111,19 +111,19 @@ Dram::~Dram()
std::cout << name() << std::string(" Total Energy: ")
<< std::fixed << std::setprecision( 2 )
<< DRAMPower->getEnergy().total_energy
* Configuration::getInstance().NumberOfDevicesOnDIMM
* Configuration::getInstance().numberOfDevicesOnDIMM
<< std::string(" pJ")
<< std::endl;
std::cout << name() << std::string(" Average Power: ")
<< std::fixed << std::setprecision( 2 )
<< DRAMPower->getPower().average_power
* Configuration::getInstance().NumberOfDevicesOnDIMM
* Configuration::getInstance().numberOfDevicesOnDIMM
<< std::string(" mW") << std::endl;
}
delete DRAMPower;
if (Configuration::getInstance().UseMalloc)
if (Configuration::getInstance().useMalloc)
free(memory);
}

2
DRAMSys/library/src/simulation/dram/DramDDR3.cpp
View File

@@ -50,7 +50,7 @@ DramDDR3::DramDDR3(sc_module_name name) : Dram(name)
if (memSpec == nullptr)
SC_REPORT_FATAL("DramDDR3", "Wrong MemSpec chosen");
if (Configuration::getInstance().PowerAnalysis)
if (Configuration::getInstance().powerAnalysis)
{
sc_time clk = memSpec->clk;

2
DRAMSys/library/src/simulation/dram/DramDDR4.cpp
View File

@@ -50,7 +50,7 @@ DramDDR4::DramDDR4(sc_module_name name) : Dram(name)
if (memSpec == nullptr)
SC_REPORT_FATAL("DramDDR4", "Wrong MemSpec chosen");
if (Configuration::getInstance().PowerAnalysis)
if (Configuration::getInstance().powerAnalysis)
{
sc_time clk = memSpec->clk;

2
DRAMSys/library/src/simulation/dram/DramGDDR5.cpp
View File

@@ -50,7 +50,7 @@ DramGDDR5::DramGDDR5(sc_module_name name) : Dram(name)
if (memSpec == nullptr)
SC_REPORT_FATAL("DramGDDR5", "Wrong MemSpec chosen");
if (Configuration::getInstance().PowerAnalysis)
if (Configuration::getInstance().powerAnalysis)
SC_REPORT_FATAL("DramGDDR5", "DRAMPower not supported for GDDR5");
else
DRAMPower = new libDRAMPowerDummy();

2
DRAMSys/library/src/simulation/dram/DramGDDR5X.cpp
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@@ -50,7 +50,7 @@ DramGDDR5X::DramGDDR5X(sc_module_name name) : Dram(name)
if (memSpec == nullptr)
SC_REPORT_FATAL("DramGDDR5X", "Wrong MemSpec chosen");
if (Configuration::getInstance().PowerAnalysis)
if (Configuration::getInstance().powerAnalysis)
SC_REPORT_FATAL("DramGDDR5X", "DRAMPower not supported for GDDR5X");
else
DRAMPower = new libDRAMPowerDummy();

2
DRAMSys/library/src/simulation/dram/DramGDDR6.cpp
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@@ -50,7 +50,7 @@ DramGDDR6::DramGDDR6(sc_module_name name) : Dram(name)
if (memSpec == nullptr)
SC_REPORT_FATAL("DramGDDR6", "Wrong MemSpec chosen");
if (Configuration::getInstance().PowerAnalysis)
if (Configuration::getInstance().powerAnalysis)
SC_REPORT_FATAL("DramGDDR6", "DRAMPower not supported for GDDR6");
else
DRAMPower = new libDRAMPowerDummy();

2
DRAMSys/library/src/simulation/dram/DramHBM2.cpp
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@@ -50,7 +50,7 @@ DramHBM2::DramHBM2(sc_module_name name) : Dram(name)
if (memSpec == nullptr)
SC_REPORT_FATAL("DramHBM2", "Wrong MemSpec chosen");
if (Configuration::getInstance().PowerAnalysis)
if (Configuration::getInstance().powerAnalysis)
SC_REPORT_FATAL("DramHBM2", "DRAMPower not supported for HBM2");
else
DRAMPower = new libDRAMPowerDummy();

2
DRAMSys/library/src/simulation/dram/DramLPDDR4.cpp
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@@ -50,7 +50,7 @@ DramLPDDR4::DramLPDDR4(sc_module_name name) : Dram(name)
if (memSpec == nullptr)
SC_REPORT_FATAL("DramLPDDR4", "Wrong MemSpec chosen");
if (Configuration::getInstance().PowerAnalysis)
if (Configuration::getInstance().powerAnalysis)
SC_REPORT_FATAL("DramLPDDR4", "DRAMPower not supported for LPDDR4");
else
DRAMPower = new libDRAMPowerDummy();

12
DRAMSys/library/src/simulation/dram/DramRecordable.cpp
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@@ -57,7 +57,7 @@ DramRecordable<BaseDram>::DramRecordable(sc_module_name name, TlmRecorder *tlmRe
{
// Create a thread that is triggered every $powerWindowSize
// to generate a Power over Time plot in the Trace analyzer:
if (Configuration::getInstance().PowerAnalysis)
if (Configuration::getInstance().powerAnalysis)
{
DRAMPower = dynamic_cast<libDRAMPower *>(Dram::DRAMPower);
if (DRAMPower == nullptr)
@@ -69,12 +69,12 @@ DramRecordable<BaseDram>::DramRecordable(sc_module_name name, TlmRecorder *tlmRe
template<class BaseDram>
DramRecordable<BaseDram>::~DramRecordable()
{
if (Configuration::getInstance().PowerAnalysis)
if (Configuration::getInstance().powerAnalysis)
{
DRAMPower->calcEnergy();
tlmRecorder->recordPower(sc_time_stamp().to_seconds(),
DRAMPower->getPower().window_average_power
* Configuration::getInstance().NumberOfDevicesOnDIMM);
* Configuration::getInstance().numberOfDevicesOnDIMM);
}
tlmRecorder->closeConnection();
}
@@ -133,15 +133,15 @@ void DramRecordable<BaseDram>::powerWindow()
// Store the time (in seconds) and the current average power (in mW) into the database
tlmRecorder->recordPower(sc_time_stamp().to_seconds(),
DRAMPower->getPower().window_average_power
* Configuration::getInstance().NumberOfDevicesOnDIMM);
* Configuration::getInstance().numberOfDevicesOnDIMM);
// Here considering that DRAMPower provides the energy in pJ and the power in mW
PRINTDEBUGMESSAGE(this->name(), string("\tWindow Energy: \t") + to_string(
DRAMPower->getEnergy().window_energy *
Configuration::getInstance().NumberOfDevicesOnDIMM) + string("\t[pJ]"));
Configuration::getInstance().numberOfDevicesOnDIMM) + string("\t[pJ]"));
PRINTDEBUGMESSAGE(this->name(), string("\tWindow Average Power: \t") + to_string(
DRAMPower->getPower().window_average_power *
Configuration::getInstance().NumberOfDevicesOnDIMM) + string("\t[mW]"));
Configuration::getInstance().numberOfDevicesOnDIMM) + string("\t[mW]"));
} while (true);
}

2
DRAMSys/library/src/simulation/dram/DramRecordable.h
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@@ -59,7 +59,7 @@ private:
libDRAMPower *DRAMPower;
sc_time powerWindowSize = Configuration::getInstance().memSpec->clk *
Configuration::getInstance().WindowSize;
Configuration::getInstance().windowSize;
// When working with floats, we have to decide ourselves what is an
// acceptable definition for "equal". Here the number is compared with a

2
DRAMSys/library/src/simulation/dram/DramWideIO.cpp
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@@ -52,7 +52,7 @@ DramWideIO::DramWideIO(sc_module_name name) : Dram(name)
if (memSpec == nullptr)
SC_REPORT_FATAL("DramWideIO", "Wrong MemSpec chosen");
if (Configuration::getInstance().PowerAnalysis)
if (Configuration::getInstance().powerAnalysis)
{
sc_time clk = memSpec->clk;

2
DRAMSys/library/src/simulation/dram/DramWideIO2.cpp
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@@ -50,7 +50,7 @@ DramWideIO2::DramWideIO2(sc_module_name name) : Dram(name)
if (memSpec == nullptr)
SC_REPORT_FATAL("DramWideIO2", "Wrong MemSpec chosen");
if (Configuration::getInstance().PowerAnalysis)
if (Configuration::getInstance().powerAnalysis)
SC_REPORT_FATAL("DramWideIO2", "DRAMPower not supported for WideIO2");
else
DRAMPower = new libDRAMPowerDummy();

2
DRAMSys/simulator/main.cpp
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@@ -94,7 +94,7 @@ int sc_main(int argc, char **argv)
// Bind STL Players with DRAMSys:
for (size_t i = 0; i < players.size(); i++) {
if(Configuration::getInstance().CheckTLM2Protocol)
if(Configuration::getInstance().checkTLM2Protocol)
{
string str = "TLMCheckerPlayer" + std::to_string(i);
tlm_utils::tlm2_base_protocol_checker<> *playerTlmChecker =