derek/DRAMSys
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Correct timings.

Browse Source
This commit is contained in:
Lukas Steiner
2021-08-26 09:10:04 +02:00
parent fc89184b4e
commit 484dbb2841
1 changed files with 11 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files

22
DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-4400A.json
View File

@@ -48,18 +48,18 @@
"FAW_dlr": 0,
"WTR_L": 22,
"WTR_S": 6,
"RFC_slr": 429,
"RFC_slr": 286,
"RFC_dlr": 0,
"RFC_dlr": 0,
"RFC_dpr": 0,
"RFC_dpr": 0,
"RFCsb_slr": 253,
"RFCsb_dlr": 0,
"REFI1": 8580,
"REFI2": 4290,
"RFC1_slr": 429,
"RFC2_slr": 286,
"RFC1_dlr": 0,
"RFC2_dlr": 0,
"RFC1_dpr": 0,
"RFC2_dpr": 0,
"RFCsb_slr": 253,
"RFCsb_dlr": 0,
"REFI1": 8580,
"REFI2": 4290,
"REFISB": 2145,
"REFSBRD_slr": 66,
"REFSBRD_slr": 66,
"REFSBRD_dlr": 0,
"RTRS": 2,
"CPDED": 11,