diff --git a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-4400A.json b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-4400A.json
index cd9bdced..6adb2a87 100644
--- a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-4400A.json
+++ b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-4400A.json
@@ -48,18 +48,18 @@
             "FAW_dlr": 0,
             "WTR_L": 22,
             "WTR_S": 6,
-            "RFC_slr": 429,
-            "RFC_slr": 286,            
-            "RFC_dlr": 0,
-            "RFC_dlr": 0,            
-            "RFC_dpr": 0,
-            "RFC_dpr": 0,            
-            "RFCsb_slr": 253,  
-            "RFCsb_dlr": 0,  
-            "REFI1": 8580, 
-            "REFI2": 4290, 
+            "RFC1_slr": 429,
+            "RFC2_slr": 286,
+            "RFC1_dlr": 0,
+            "RFC2_dlr": 0,
+            "RFC1_dpr": 0,
+            "RFC2_dpr": 0,
+            "RFCsb_slr": 253,
+            "RFCsb_dlr": 0,
+            "REFI1": 8580,
+            "REFI2": 4290,
             "REFISB": 2145,
-            "REFSBRD_slr": 66, 
+            "REFSBRD_slr": 66,
             "REFSBRD_dlr": 0,
             "RTRS": 2,
             "CPDED": 11,