New DDR3 address mapping files.

Matthias sent these files to me via e-mail (20161018).
This commit is contained in:
Éder F. Zulian
2016-10-18 22:17:58 +02:00
parent 4c6cdad982
commit 0735bc33eb
2 changed files with 50 additions and 0 deletions

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<!--
DDR3 Example:
1GB x64 DIMM with: 8 * 1 Gb x8 Devices (e.g. Micron MT41J128M8) with Page Size: 1KB
Device Characteristics:
Rows: 16 K [13:0] -> 14 bit
Bank: 8 [2:0] -> 3 bit
Cols: 1 K [9:0] -> 10 bit
Due to the DIMM we have a Byte Offset Y
2 2 2 | 2 2 2 2 2 2 2 1 1 1 1 1 1 1 | 1 1 1
9 8 7 | 6 5 4 3 2 1 0 9 8 7 6 5 4 3 | 2 1 0 9 8 7 6 5 4 3 | 2 1 0
B B B | R R R R R R R R R R R R R R | C C C C C C C C C C | Y Y Y
-->
<addressmapping>
<channel from="128" to="128" /> <!-- only one channel -->
<bank from="27" to="29" />
<row from="13" to="26" />
<column from="3" to="12" />
<bytes from="0" to="2" />
</addressmapping>

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<!--
DDR3 Example:
2GB x64 DIMM with: 8 * 2 Gb x8 Devices (e.g. Micron MT41J256M8) with Page Size: 1KB
Device Characteristics:
Rows: 32 K [14:0] -> 15 bit
Bank: 8 [2:0] -> 3 bit
Cols: 1 K [9:0] -> 10 bit
Due to the DIMM we have a Byte Offset Y
3 2 2 | 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 | 1 1 1
0 9 8 | 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 | 2 1 0 9 8 7 6 5 4 3 | 2 1 0
B B B | R R R R R R R R R R R R R R R | C C C C C C C C C C | Y Y Y
-->
<addressmapping>
<channel from="128" to="128" /> <!-- only one channel -->
<bank from="28" to="30" />
<row from="13" to="27" />
<column from="3" to="12" />
<bytes from="0" to="2" />
</addressmapping>