New DDR3 address mapping files.
Matthias sent these files to me via e-mail (20161018).
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<!--
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DDR3 Example:
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1GB x64 DIMM with: 8 * 1 Gb x8 Devices (e.g. Micron MT41J128M8) with Page Size: 1KB
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Device Characteristics:
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Rows: 16 K [13:0] -> 14 bit
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Bank: 8 [2:0] -> 3 bit
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Cols: 1 K [9:0] -> 10 bit
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Due to the DIMM we have a Byte Offset Y
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2 2 2 | 2 2 2 2 2 2 2 1 1 1 1 1 1 1 | 1 1 1
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9 8 7 | 6 5 4 3 2 1 0 9 8 7 6 5 4 3 | 2 1 0 9 8 7 6 5 4 3 | 2 1 0
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B B B | R R R R R R R R R R R R R R | C C C C C C C C C C | Y Y Y
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-->
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<addressmapping>
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<channel from="128" to="128" /> <!-- only one channel -->
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<bank from="27" to="29" />
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<row from="13" to="26" />
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<column from="3" to="12" />
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<bytes from="0" to="2" />
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</addressmapping>
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<!--
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DDR3 Example:
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2GB x64 DIMM with: 8 * 2 Gb x8 Devices (e.g. Micron MT41J256M8) with Page Size: 1KB
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Device Characteristics:
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Rows: 32 K [14:0] -> 15 bit
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Bank: 8 [2:0] -> 3 bit
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Cols: 1 K [9:0] -> 10 bit
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Due to the DIMM we have a Byte Offset Y
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3 2 2 | 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 | 1 1 1
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0 9 8 | 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 | 2 1 0 9 8 7 6 5 4 3 | 2 1 0
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B B B | R R R R R R R R R R R R R R R | C C C C C C C C C C | Y Y Y
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-->
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<addressmapping>
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<channel from="128" to="128" /> <!-- only one channel -->
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<bank from="28" to="30" />
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<row from="13" to="27" />
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<column from="3" to="12" />
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<bytes from="0" to="2" />
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</addressmapping>
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